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Bus (computing)
Known as:
Cache bus
, EDB
, Bus (computer)
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In computer architecture, a bus (a contraction of the Latin omnibus) is a communication system that transfers data between components inside a…
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Related topics
Related topics
50 relations
AMD Radeon Rx 200 series
Accelerated Graphics Port
Aircraft Communications Addressing and Reporting System
Blinkenlights
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Broader (1)
Motherboard
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2014
Highly Cited
2014
Bounding memory interference delay in COTS-based multi-core systems
Hyoseung Kim
,
Dionisio de Niz
,
Björn Andersson
,
M. Klein
,
O. Mutlu
,
R. Rajkumar
IEEE Real Time Technology and Applications…
2014
Corpus ID: 7693525
In commercial-off-the-shelf (COTS) multi-core systems, a task running on one core can be delayed by other tasks running…
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Review
2012
Review
2012
A Review of Information Dissemination Protocols for Vehicular Ad Hoc Networks
Sooksan Panichpapiboon
,
W. Pattara-Atikom
IEEE Communications Surveys and Tutorials
2012
Corpus ID: 14276212
With the fast development in ad hoc wireless communications and vehicular technology, it is foreseeable that, in the near future…
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Highly Cited
2010
Highly Cited
2010
Power System Stabilizers Design for Interconnected Power Systems
G. Gurrala
,
I. Sen
IEEE Transactions on Power Systems
2010
Corpus ID: 12487622
This paper proposes a method of designing fixed parameter decentralized power system stabilizers (PSS) for interconnected multi…
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Highly Cited
2010
Highly Cited
2010
Systematic module and interface definition using component design structure matrix
R. Helmer
,
A. Yassine
,
C. Meier
2010
Corpus ID: 52250405
Modular product architectures can offer many benefits, but require carefully chosen interfaces as early as possible in the…
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Highly Cited
2006
Highly Cited
2006
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
Taeho Kgil
,
Shaun C. D'Souza
,
+5 authors
K. Flautner
ASPLOS XII
2006
Corpus ID: 824726
In this paper, we show how 3D stacking technology can be used to implement a simple, low-power, high-performance chip…
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Highly Cited
2006
Highly Cited
2006
A probabilistic load flow method considering branch outages
Zechun Hu
,
Xifan Wang
IEEE Transactions on Power Systems
2006
Corpus ID: 24621086
This paper proposes a probabilistic load flow method considering random branch outages as well as uncertainties of nodal power…
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Highly Cited
2004
Highly Cited
2004
Sustained Effects of the PATHS Curriculum on the Social and Psychological Adjustment of Children in Special Education
Chi-Ming Kam
,
M. Greenberg
,
C. Kusché
2004
Corpus ID: 1892018
In this study, the authors examined the long-term effectiveness of the PATHS (Promoting Alternative THinking Strategies…
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Highly Cited
1999
Highly Cited
1999
Answering Queries Using Materialized Views with Disjunctions
F. Afrati
,
M. Gergatsoulis
,
Theodoros G. Kavalieros
International Conference on Database Theory
1999
Corpus ID: 426233
We consider the problem of answering datalog queries using materialized views. More specifically, queries are rewritten to refer…
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Highly Cited
1988
Highly Cited
1988
ShuffleNet: an application of generalized perfect shuffles to multihop lightwave networks
M. Hluchyj
,
M. Karol
IEEE INFOCOM '88,Seventh Annual Joint Conference…
1988
Corpus ID: 62279602
The authors propose a multihop wavelength-division-multiplexing (WDM) approach, referred to as ShuffleNet, for achieving…
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Highly Cited
1985
Highly Cited
1985
Implementing a cache consistency protocol
R. Katz
,
S. Eggers
,
D. Wood
,
Charles L. Perkins
,
R. G. Sheldon
International Symposium on Computer Architecture
1985
Corpus ID: 15406054
We present an ownership-based multiprocessor cache consistency protocol, designed for implementation by a single chip VLSI cache…
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