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Simultaneous multithreading: Maximizing on-chip parallelism
- D. Tullsen, S. Eggers, H. Levy
- Computer ScienceProceedings 22nd Annual International Symposium…
- 1 May 1995
Simultaneous multithreading has the potential to achieve 4 times the throughput of a superscalar, and double that of fine-grain multi-threading, and is an attractive alternative to single-chip multiprocessors.
Extensibility safety and performance in the SPIN operating system
This paper describes the motivation, architecture and performance of SPIN, an extensible operating system. SPIN provides an extension infrastructure, together with a core set of extensible services,…
Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor
- D. Tullsen, S. Eggers, J. Emer, H. Levy, J. Lo, Rebecca L. Stamm
- Computer Science23rd Annual International Symposium on Computer…
- 15 May 1996
This paper presents an architecture for simultaneous multithreading that minimizes the architectural impact on the conventional superscalar design, has minimal performance impact on a single thread executing alone, and achieves significant throughput gains when running multiple threads.
Simultaneous multithreading: a platform for next-generation processors
- S. Eggers, J. Emer, H. Levy, J. Lo, Rebecca L. Stamm, D. Tullsen
- Computer ScienceIEEE Micro
- 1 September 1997
Because simultaneous multithreading successfully (and simultaneously) exploits both types of parallelism, SMT processors use resources more efficiently, and both instruction throughput and speedups are greater.
Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading
This article identifies the hardware bottlenecks that prevent multiprocessors from effectively exploiting ILP and TLP, and shows that because of its dynamic resource sharing, SMT avoids these inefficiencies and benefits from being able to run more threads on a single processor.
DyC: an expressive annotation-directed dynamic compiler for C
An analysis of database workload performance on simultaneous multithreaded processors
- J. Lo, L. Barroso, S. Eggers, K. Gharachorloo, H. Levy, S. Parekh
- Computer ScienceProceedings. 25th Annual International Symposium…
- 16 April 1998
Examining database performance on SMT processors using traces of the Oracle database management system characterizes the memory-system behavior of database systems running on-line transaction processing and decision support system workloads and shows that SMT's latency tolerance is highly effective for database applications.
Fast, effective dynamic compilation
- Joel Auslander, Matthai Philipose, C. Chambers, S. Eggers, B. Bershad
- Computer SciencePLDI '96
- 1 May 1996
This work targets general- purpose, imperative programming languages, initially C, and strives for both fast dynamic compilation and high-quality dynamically-compiled code.
Nooks: an architecture for reliable device drivers
With the enormous growth in processor performance over the last decade, it is clear that reliability, rather than performance, is now the greatest challenge for computer systems research. This is…
SPIN: an extensible microkernel for application-specific operating system services
The SPIN operating system enables system services to be defined in an application-specific fashion through an extensible microkernel and offers applications fine-grained control over a machine's logical and physical resources through run-time adaptation of the system to application requirements.