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31-bit
Known as:
31 bit
In computer architecture, 31-bit integers, memory addresses, or other data units are those that are 31 bits wide. In 1983, IBM introduced 31-bit…
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Related topics
Related topics
15 relations
26-bit
32-bit
COBOL
Calling convention
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
A 2.4-µA 868-MHz low latency wake-up receiver for strong interference channels
H. Milosiu
,
F. Oehler
,
R. Weigel
European Microwave Integrated Circuits Conference
2013
Corpus ID: 18411458
This paper describes an innovative approach for integrated ultra-low current wireless receivers for UHF bands in a 180-nm CMOS…
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2010
2010
Performance Evaluation of Pseudo-Code in Multi-User Environment
A. Ahamed
2010
Corpus ID: 196134873
2010
2010
DSAs in 31-bit storage: ECDSA, EUDSA, ESDSA, ERDSA, and ETDSA
Revisions Tina Anderson
,
Revision Cics Dispatcher Rework Amy Ferrell
,
Original Margaret Fisher
2010
Corpus ID: 61746604
2008
2008
OCaml light in Ott Scott Owens
Scott Owens
2008
Corpus ID: 14445552
OCamllight key points •Written in Ott • Faithful to Objective Caml (very nearly) • Type soundness proof mechanized in HOL (Coq…
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2006
2006
Hardware Acceleration of Parallel Lagged-Fibonacci Pseudo Random Number Generation
Yu Bi
,
G. D. Peterson
,
G. L. Warren
,
R. Harrison
International Conference on Engineering of…
2006
Corpus ID: 16911071
The Scalable Parallel Random Number Generators (SPRNG) library is widely used to generate random numbers in Monte Carlo…
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2006
2006
Upgrading from IBM 31-bit SDK for z/OS, Java Technology Edition, Version 6
M. Fisher
2006
Corpus ID: 61846132
1996
1996
A HIGH-SPEED HIGH-DENSITY ARRAY-MULTIPLIER-ACCUMULATOR FOR DIGITAL SIGNAL PROCESSING
T. Minami
,
R. Kasai
,
H. Matsuda
,
Ritsu Kusaba
1996
Corpus ID: 61070329
This paper discusses the downsizing and speed improvement of short-word multiplier-accumulators, which are frequently used in…
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1991
1991
When 31 Bit REAL is not Enough
Rick Brandenstein
Int. CMG Conference
1991
Corpus ID: 11181595
1973
1973
Techniques for Subnanosecond Logic.
Carl E. James
,
Kenneth B. de Graaf
,
F. Carper
1973
Corpus ID: 60014907
Abstract : This report describes the design and development of a high speed multiplexing/demultiplexing system with digital…
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