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Trace table
A trace table is a technique used to test algorithms, in order to make sure that no logical errors occur whilst the algorithm is being processed. The…
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Algorithm
Debugging
Programmer
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
High performance scheduling of mixed-mode DAGs on heterogeneous multicores
Agnes Rohlin
,
Henrik Fahlgren
,
M. Pericàs
arXiv.org
2019
Corpus ID: 58014142
Many HPC applications can be expressed as mixed-mode computations, in which each node of a computational DAG is itself a parallel…
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Review
2017
Review
2017
Utilizing Programming Education Support Tool Pgtracer in an Actual Programming Course
T. Kakeshita
,
Miyuki Murata
IIAI International Conference on Advanced Applied…
2017
Corpus ID: 21658787
We developed a programming education support tool pgtracer. Pgtracer provides fill-in-the-blank questions to the students and…
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2016
2016
Student Feedback Function for Web-Based Programming Education Support Tool Pgtracer
T. Kakeshita
,
Kosuke Ohta
IIAI International Conference on Advanced Applied…
2016
Corpus ID: 18949996
Computer programming is essential in engineering education. We are developing a programming education support tool pgtracer in…
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2015
2015
A Programming Education Support Tool pgtracer utilizing Fill-in-the-Blank Questions-Teacher Functions
T. Kakeshita
,
Kosuke Ohta
,
Ryo Yanagita
,
Mika Ohtsuki
2015
Corpus ID: 59950002
We are developing a programming education support tool pgtracer utilizing fill-in-the-blank questions. Pgtracer operates on…
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2012
2012
Suggestions for Tele-Seismic Hypocentre Location using Table-driven Scanning
G. R. Daglish
,
Y. Sizov
2012
Corpus ID: 17965447
This paper attempts to describe a small subsystem, intended to form part of a body of intelligenced Seismic software, which is…
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2009
2009
Requirements Trace Table Expansion and How to Normalization
Ju-Young Kim
,
S. Rhew
2009
Corpus ID: 61165329
There are various methods to trace output in software development to verify the consistency and completeness of requirements…
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2008
2008
Execution platform modeling for system-level architecture performance analysis
Vladimir D. Zivkovic
2008
Corpus ID: 59756830
Today's embedded systems are designed for more complex and more computationally-intensive applications than they were a decade…
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2006
2006
Trace cache miss tolerance for deeply pipelined superscalar processors
G. Reinman
,
G. Pitigoi-Aron
2006
Corpus ID: 62610820
The trace cache is a technique that provides accurate, high bandwidth instruction fetch. However, when a desired instruction…
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1999
1999
Potential of farm-rejected banana fruit (var. Cavendish) as feed for feedlot cattle (Potensi buah pisang (var. Cavendish) tolakan ladang sebagai makanan lembu fidlot)
I. Sukri
,
M. Zahari
,
P. Awis
1999
Corpus ID: 55950326
A study was conducted to determine the nutritive value of farm-rejected banana (var. Cavendish) fruit as ruminant feed. Proximate…
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Highly Cited
1997
Highly Cited
1997
Trace Table Based Approach for Pipeline Microprocessor Verification
J. Sawada
,
W. Hunt
International Conference on Computer Aided…
1997
Corpus ID: 8255515
This paper presents several techniques for formally verifying pipelined microprocessor implementations that contain out-of-order…
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