FAQ

Tile processor

Tile processors are multicore or manycore chips that contain one-dimensional, or more commonly, two-dimensional arrays of identical tiles. Each tile… (More)
Wikipedia

Topic mentions per year

Topic mentions per year

2004-2015
01220042015

Related topics

Related topics

3 relations

Broader (1)

Central processing unit
Multi-core processorTILEPro64

Related mentions per year

Related mentions per year

1955-2018
1960198020002020
Tile processor
Central processing unit
Multi-core processor
TILEPro64

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
High-performance optimizations on tiled many-core embedded systems: a matrix multiplication case study
Technological advancements in the silicon industry, as predicted by Moore’s law, have resulted in an increasing number of… (More)
  • figure 1
  • table 1
  • figure 2
  • figure 4
  • table 2
Is this relevant?
2011
2011
Experience with Improving Distributed Shared Cache Performance on Tilera's Tile Processor
This paper describes our experience with profiling and optimizing physical locality for the distributed shared cache (DSC) in… (More)
  • figure 1
  • figure 3
  • figure 4
  • table 1
  • table 2
Is this relevant?
2011
2011
Scalable Lightweight Task Management for MIMD Processors
Multiple Instruction Multiple Data (MIMD) processors are becoming increasingly viable for realizing enhanced performance in… (More)
  • figure 1
  • figure 2
  • figure 3
  • table 1
  • figure 5
Is this relevant?
2011
2011
Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems
A reconfigurable and programmable streaming processor core complemented with interconnected arithmetic units for the acceleration… (More)
  • figure 1
  • figure 2
  • table II
  • table I
  • figure 3
Is this relevant?
2010
2010
Early Experience with Profiling and Optimizing Distributed Shared Cache Performance on Tilera’s Tile Processor
This paper describes our experience with profiling and optimizing physical locality for the distributed shared cache (DSC) in… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • table I
Is this relevant?
2009
2009
Cognitive Radio baseband processing on a reconfigurable platform
Cognitive Radio is considered as a promising technology to address the paradoxof spectrum scarcity and spectrum under-utilization… (More)
  • figure 1
  • figure 2
  • figure 3
  • table 1
  • table 2
Is this relevant?
Highly Cited
2007
Highly Cited
2007
On-Chip Interconnection Architecture of the Tile Processor
IMesh, the tile processor architecture's on-chip interconnection network, connects the multicore processor's tiles with five 2D… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2007
2007
The Tile Processorâ„¢ architecture: Embedded multicore for networking and digital multimedia
  • 2007 IEEE Hot Chips 19 Symposium (HCS)
  • 2007
This article consists of a collection of slides from the author's conference presentation on Tilera's Tile Processor system… (More)
Is this relevant?
2007
2007
On-chip Interconnection Architecture of the Tile Processor Imesh, the Tile Processor Architecture's On-chip Interconnection Network, Connects the Multicore Processor's Tiles with Five 2d Mesh…
......As the number of processor cores integrated onto a single die increases, the design space for interconnecting these cores… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
2004
2004
Energy-Efficiency of the MONTIUM Reconfigurable Tile Processor
Primary requirements of wireless multimedia handheld computers are high-performance, flexibility, energy-efficiency and low costs… (More)
  • figure 1
  • table 1
  • figure 2
  • table 2
  • table 5
Is this relevant?