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TigerSHARC
Known as:
Analog Devices TigerSHARC
TigerSHARC refers to a family of microprocessors currently manufactured by Analog Devices Inc (ADI).
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3 relations
Blackfin
Microprocessor
Super Harvard Architecture Single-Chip Computer
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Design and Research of TigerSHARC Sonar Signal Processing System
W. Yingmin
2011
Corpus ID: 203971070
Large-scale TigerSHARC DSP high-speed parallel signal processing board is used to design and research the dipping sonar signal…
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2005
2005
Optical ray tracing using parallel processors
C. B. Cameron
,
Rosa Nivea Rodriguez
,
N. Padgett
,
E. Waluschka
,
S. Kizhner
IEEE Transactions on Instrumentation and…
2005
Corpus ID: 6122006
One of the instruments on the sun-synchronous Terra (EOS AM) and Aqua (EOS PM) spacecraft, the Moderate Resolution…
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2004
2004
SDRAM Selection Guidelines and Configuration for ADI Processors
Maikel Kokaly-Bannourah
2004
Corpus ID: 208932543
Copyright 2004, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or…
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2004
2004
An efficient implementation of turbo decoder on ADI TIGERSHARC TS201 DSP
R. Kothandaraman
,
M. López
International Conference on Signal Processing and…
2004
Corpus ID: 18496642
This paper describes an efficient software implementation of the 3GPP turbo decoder on the ADI TS201 TigerSHARC DSP. The turbo…
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2004
2004
ADSP-TS20x TigerSHARC® Processor Boot Loader Kernels Operation
B. Lerner
2004
Corpus ID: 62459503
The loader kernel is a self-modifying program that is transferred into the processor’s internal memory. The ADSP-TS20x family of…
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2003
2003
A high-performance communication service for parallel computing on distributed DSP systems
J. Kohout
,
A. George
Parallel Comput.
2003
Corpus ID: 10158021
2002
2002
Code Optimization Techniques of Data-Intensive Tasks onto Statically Scheduled Architectures: Optimal Performance on the TigerSharc
Norbert A. Pilz
,
K. Adamson
PARA
2002
Corpus ID: 28892209
This paper considers code optimization using the novel TS1xx processor from Analog Devices. Very large instruction word…
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2002
2002
Rethinking Base Station , Baseband Processing for Wireless
2002
Corpus ID: 2726025
The currently deployed wireless infrastructure supports the second generation of mobile communications comprised of many…
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2002
2002
A Distributed Approach for Intelligent Reconfiguration of Wireless Mobile Networks
K. Madani
,
T. Karran
,
+11 authors
M. Forster
2002
Corpus ID: 18793774
The paper describes development of a generic architecture for the intelligent reconfiguration of the wireless mobile networks…
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Highly Cited
2000
Highly Cited
2000
The TigerSHARC DSP Architecture
J. Fridman
,
Z. Greenfield
IEEE Micro
2000
Corpus ID: 206433605
This highly parallel DSP architecture based on a short-vector memory system incorporates techniques found in general-purpose…
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