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SystemVerilog

Known as: SV, System verilog 
In the semiconductor and electronic design industry, SystemVerilog is a combined hardware description language and hardware verification language… 
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Papers overview

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2014
2014
Two design approaches for multifunctional information carriers are introduced. In the first one, quick response (QR) code… 
2013
2013
Single Event Upset (SEU) measurements were performed using the European Space Agency's (ESA) Standard SEU Monitor in the H4… 
2013
2013
LLBMC is a tool for detecting bugs and runtime errors in C and C++ programs. It is based on bounded model checking using an SMT… 
2009
2009
Stereo vision (SV) is widely used and is well known for many 3-D image applications. In this paper, a 3D time-of-flight system… 
2003
2003
A unified multi‐stage power‐CMOS‐transmission‐gate‐based quasi‐switched‐capacitor (QSC) DC–DC converter is proposed to integrate… 
2002
2002
Preparation of high quality personnel to provide educational services to students with disabilities living in rural areas is, at… 
2000
2000
Just as the transversely isotropic model with a vertical symmetry axis (VTI media) is typical for describing horizontally layered… 
Highly Cited
1999
Highly Cited
1999
ly we have the following setting for our problem. We are given a finite set S of generators and a finite set E of equations of… 
1962
1962
Dispersion of Love and Rayleigh waves has been computed for a model of the suboceanic crust and mantle. An important feature of…