Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 236,830,078 papers from all fields of science
Search
Sign In
Create Free Account
Symbolic simulation
In computer science, a simulation is a computation of the execution of some appropriately modelled state-transition system. Typically this process…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
11 relations
Abstract interpretation
Extended static checking
Formal verification
Model checking
Expand
Broader (2)
Electronic design automation
Formal methods
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Exact stuck-at fault classification in presence of unknowns
Stefan Hillebrecht
,
M. Kochte
,
H. Wunderlich
,
B. Becker
IEEE European Test Symposium
2012
Corpus ID: 15548805
Fault simulation is an essential tool in electronic design automation. The accuracy of the computation of fault coverage in…
Expand
2011
2011
Efficient BDD-based Fault Simulation in Presence of Unknown Values
M. Kochte
,
S. Kundu
,
K. Miyase
,
X. Wen
,
H. Wunderlich
Asian Test Symposium
2011
Corpus ID: 13855110
Unknown (X) values, originating from memories, clock domain boundaries or A/D interfaces, may compromise test signatures and…
Expand
2010
2010
Path Directed Symbolic Execution in the K Framework
I. Asavoae
,
Mihail Asavoae
,
D. Lucanu
12th International Symposium on Symbolic and…
2010
Corpus ID: 16701073
The K framework is a rewrite-based executable semantic framework built with the purpose to define programming languages and…
Expand
2010
2010
Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemC
Jon Perez
,
C. Nicolás
,
R. Obermaisser
,
C. E. Salloum
Forum on Specification and Design Languages
2010
Corpus ID: 5325366
This paper proposes a SystemC based extension for the modeling of generic Time-Triggered Architecture (TTA) based safety-critical…
Expand
2005
2005
SIMULATION SYMBOLIQUE DES CIRCUITS DÉCRITS AU NIVEAU ALGORITHMIQUE
G. Al-Sammane
,
A. Jerraya
2005
Corpus ID: 125903504
Ce travail de these presente une methode originale pour la simulation symbolique des circuits decrits au niveau algorithmique…
Expand
2003
2003
Collection of high-level microprocessor bugs from formal verification of pipelined and superscalar designs
M. Velev
International Test Conference, . Proceedings. ITC…
2003
Corpus ID: 14501333
The paper presents a collection of 93 different bugs, detected in formal verification of 65 student designs that include: 1…
Expand
2003
2003
Symbolic simulation as a simplifying strategy for SoC verification
E. Dumitrescu
,
D. Borrione
The 3rd IEEE International Workshop on System-on…
2003
Corpus ID: 19783920
The successful application of model-checking to industrial designs requires methods for reducing the complexity of the model…
Expand
1996
1996
Toward the rigorous use of diagrams in reasoning about hardware
Steven D. Johnson
,
J. Barwise
,
G. Allwein
1996
Corpus ID: 17520569
We propose that the concept of \formal methods" be expansive enough to include a rigorous, integrated use of diagrams for…
Expand
1994
1994
Reasoning about hybrid systems with symbolic simulation
S. Narain
1994
Corpus ID: 59967808
This paper presented DMOD, a formalization of the popular discrete-event modeling and simulation technique. The paper showed how…
Expand
1990
1990
TDRC-a symbolic simulation based design for testability rules checker
P. Varma
Proceedings. International Test Conference
1990
Corpus ID: 206676742
A symbolic simulation methodology that can be used to verify a set of standard scan-path-based, ad hoc, and boundary-scan design…
Expand