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Silicon on insulator

Known as: Semiconductor on Insulator, SOI device, Buried Oxide 
Silicon on insulator (SOI) technology refers to the use of a layered silicon–insulator–silicon substrate in place of conventional silicon substrates… 
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Related topics

Related topics

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A-RAMAMD 10hBroadway (microprocessor)Bulldozer (microarchitecture)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2013
Highly Cited
2013
Understanding the effect of PCB layout on circuit performance in a high frequency gallium nitride based point of load converter
The introduction of enhancement mode gallium nitride based power devices such as the eGaN®FET offers the potential to achieve… 
Highly Cited
2013
Highly Cited
2013
UTBB FD-SOI: A process/design symbiosis for breakthrough energy-efficiency
UTBB FD-SOI technology has become mainstream within STMicroelectronics, with the objective to serve a wide spectrum of mobile… 
Highly Cited
2006
Highly Cited
2006
A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor
The floating-point unit (FPU) in the synergistic processor element (SPE) of a CELL processor is a fully pipelined 4-way single… 
Highly Cited
2004
Highly Cited
2004
Ultrahigh-density silicon nanobridges formed between two vertical silicon surfaces
We report simultaneous lateral growth of a high density of highly oriented, metal-catalyzed silicon nanowires on a patterned… 
Highly Cited
2004
Highly Cited
2004
High inversion current in silicon nanowire field effect transistors
Silicon nanowire (SiNW) field effect transistors (FETs) with channel widths down to 20 nm have been fabricated by a conventional… 
Highly Cited
2003
Highly Cited
2003
Threshold voltage and subthreshold slope of multiple-gate SOI MOSFETs
The subthreshold swing and threshold voltage characteristics of multiple-gate SOI transistors have been numerically simulated… 
Highly Cited
1998
Highly Cited
1998
25 nm CMOS design considerations
This paper explores the limit of bulk (or partially-depleted SOI) CMOS scaling. A feasible design for 25 nm (channel length) CMOS… 
Highly Cited
1987
Highly Cited
1987
An SOI voltage-controlled bipolar-MOS device
This paper describes a new operation mode of the SOI MOSFET. Connecting the floating substrate to the gate in a short-channel SOI… 
Highly Cited
1987
Highly Cited
1987
Hot-electron effects in Silicon-on-insulator n-channel MOSFET's
Hot-electron degradation has been measured in short-channel bulk and SOI MOSFET's. The presence of a floating substrate in the… 
Highly Cited
1983
Highly Cited
1983
Effects of grain boundaries on the channel conductance of SOl MOSFET's
A physical model that describes the effects of grain boundaries on the linear-region (strong-inversion) channel conductance of… 
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