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Serial communication
Known as:
Serial link
, Bit serial
, Serial communications
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In telecommunication and computer science, serial communication is the process of sending data one bit at a time, sequentially, over a communication…
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Related topics
Related topics
50 relations
ARINC 818
Apache MINA
Apple Desktop Bus
Baudot code
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Estimation and control for an open-source quadcopter
Inkyu Sa
,
Peter Corke
IEEE International Conference on Robotics and…
2011
Corpus ID: 54973263
This paper describes modelling, estimation and control of the horizontal translational motion of an open-source and cost…
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2002
2002
Design and implementation of a novel algorithm for general purpose median filtering on FPGAs
K. Benkrid
,
D. Crookes
,
A. Benkrid
IEEE International Symposium on Circuits and…
2002
Corpus ID: 25667977
We present a novel bit serial algorithm which is scalable and easily implemented on small FPGA chips. The basis of the algorithm…
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1994
1994
PPP Reliable Transmission
D. Rand
Request for Comments
1994
Corpus ID: 6116779
This document defines a method for negotiating and using Numbered- Mode, as defined by ISO 7776 [2], to provide a reliable serial…
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1994
1994
A fast DCT processor, based on special purpose CORDIC rotators
E. Mariatos
,
D. Metafas
,
J. Hallas
,
C. Goutis
International Symposium on Circuits and Systems
1994
Corpus ID: 1455030
In this paper, a new processor that computes the Discrete Cosine Transform (DCT) is presented. Based on a recently proposed DCT…
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1993
1993
GIGAswitch System: A High-performance Packet-switching Platform
R. J. Souza
,
P. Krishnakumar
,
+4 authors
R. Walsh
Digital technical journal of Digital Equipment…
1993
Corpus ID: 14940583
The GIGAswitch system is a high-performance packet-switching platform built on a 36-port 100 Mb/s crossbar switching fabric. The…
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1990
1990
The boundary-scan master: target applications and functional requirements
C. W. Yau
,
N. Jarwala
Proceedings. International Test Conference
1990
Corpus ID: 37789033
The need for a parallel-serial bus interface chip (BSM) which supports the boundary-scan architecture is demonstrated. Various…
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1988
1988
A digital-serial silicon compiler
Richard Hartley
,
Peter F. Corbett
25th ACM/IEEE, Design Automation Conference…
1988
Corpus ID: 62390712
A novel silicon compiler is described, called PARSIFAL. It constructs chips with a data-flow architecture in which data is passed…
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Highly Cited
1984
Highly Cited
1984
Serial/Parallel Convolvers
P. Danielsson
IEEE transactions on computers
1984
Corpus ID: 12487652
A new type of convolver is presented. This type utilizes a kind of systolic array where the basic cell is mainly a full adder and…
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1983
1983
Compact NMOS building blocks and a methodology for dedicated digital filter applications
J. V. Ginderdeuren
,
H. Man
,
N. Goncalves
,
W.A.M. van Hoije
1983
Corpus ID: 62769174
Building blocks for digital filters are discussed. They require 0.7 mm/SUP 2/ or 3 mm/SUP 2/ per pole-zero for a dedicated and a…
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1982
1982
A Canonical Bit-Sequential Multiplier
N. Strader
,
V. Rhyne
IEEE transactions on computers
1982
Corpus ID: 38206924
A serial multiplier suitable for VLSI implementation is discussed. The multiplier accepts binary operands supplied in a serial…
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