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Semiconductor intellectual property core

Known as: IP Core, Logic core, IP 
In electronic design a semiconductor intellectual property core, IP core, or IP block is a reusable unit of logic, cell, or chip layout design that… 
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Broader (1)

Electronic design automation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
Improving FPGA Performance for Carry-Save Arithmetic
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry… 
Highly Cited
2008
Highly Cited
2008
A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment
  • Timo VogtN. Wehn
  • IEEE Transactions on Very Large Scale Integration…
  • 2008
  • Corpus ID: 26434988
Future mobile and wireless communication networks require flexible modem architectures to support seamless services between… 
Highly Cited
2007
Highly Cited
2007
A Fast Mode Decision Algorithm and Its VLSI Design for H.264/AVC Intra-Prediction
In this paper, we present a fast mode decision algorithm and design its VLSI architecture for H.264 intra-prediction. A regular… 
2007
2007
Multilevel MPSOC simulation using an MDE approach
In this paper, we first present an efficient Multi-Processor Systems-on-Chip design methodology based on Model-Driven Engineering… 
2005
2005
A high-performance architecture for embedded block coding in JPEG 2000
  • G. Pastuszak
  • IEEE transactions on circuits and systems for…
  • 2005
  • Corpus ID: 38936433
JPEG 2000 offers critical advantages over other still image compression schemes at the price of increased computational… 
2005
2005
Toward a processor core for real-time capable autonomic systems
This paper proposes a processor core that allows to support the autonomic computing principles in embedded hard-real-time systems… 
2004
2004
A low-power DCT IP core based on 2D algebraic integer encoding
This paper discusses the application of a new two dimensional algebraic integer encoding scheme for the design of a DCT processor… 
Highly Cited
2002
Highly Cited
2002
Embedded timing analysis: a soc infrastructure
This SoC infrastructure core is a flexible, scalable, and highly accurate embedded time interval analyzer (ETIA), used to measure… 
2002
2002
Presentation of an efficient design methodology for FPGA implementation of control systems. Application to the design of an antiwindup PI controller
This paper presents an efficient design methodology to develop IP-core functions in VHDL for control systems. This methodology is… 
Highly Cited
1999
Highly Cited
1999
Verifying IP-core based system-on-chip designs
We describe a methodology for verifying system-on-chip designs. In our methodology, the problem of verifying system-on-chip… 
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