Skip to search formSkip to main contentSkip to account menu

SPARC

Known as: Sun Sparc, SPARC International, SPARC (disambiguation) 
The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by… 
Wikipedia (opens in a new tab)

Related topics

Related topics

50 relations
32-bitAfara WebsystemsBerkeley RISCBit numbering

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2005
2005
Parallel Queue Processor Architecture Based on Produced Order Computation Model
This paper proposes novel produced order parallel queue processor architecture. To store intermediate results, the proposed… 
2002
2002
Migration velocity analysis from locally coherent events in 2-D laterally heterogeneous media, Part II: Applications on synthetic and real data
We demonstrate a method for estimating 2-D velocity models from synthetic and real seismic reflection data in the framework of… 
2000
2000
Mixed-mode Bytecode Execution
Modern high-performance virtual machines use dynamic compilation. There is a tension between compilation speed and code quality… 
Highly Cited
1997
Highly Cited
1997
QSPR as a means of predicting and understanding chemical and physical properties in terms of structure
Abstract 
1997
1997
Toward a Scalable Distributed {WWW} Server on Workstation Clusters
In this paper, we investigate the issues involved in developing a scalable World Wide Web (WWW) server called SWEB on a cluster… 
Highly Cited
1995
Highly Cited
1995
Computing without Clocks: Micropipelining the ARM Processor
High-performance VLSI microprocessors are becoming very power hungry; this presents an increasing problem of heat removal in desk… 
1994
1994
Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications
  • J. Gaisler
  • Proceedings of IEEE 24th International Symposium…
  • 1994
  • Corpus ID: 15293777
This paper describes the concurrent error-detection methods employed in the ERC32, a 32-bit processing core for embedded space… 
Highly Cited
1993
Highly Cited
1993
PHI - A Logic-Based Tool for Intelligent Help Systems
We introduce a logic-based system which improves the performance of intelligent help systems by supplying them with plan… 
1993
1993
ES∗: An expert systems development planner using a constraint and rule-based approach
Highly Cited
1985
Highly Cited
1985
Discovering Patterns in Sequences of Events
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)