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SPARC
Known as:
Sun Sparc
, SPARC International
, SPARC (disambiguation)
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The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by…
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Related topics
Related topics
50 relations
32-bit
Afara Websystems
Berkeley RISC
Bit numbering
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2002
2002
Migration velocity analysis from locally coherent events in 2-D laterally heterogeneous media, Part II: Applications on synthetic and real data
H. Chauris
,
M. Noble
,
G. Lambaré
,
P. Podvin
2002
Corpus ID: 18822959
We demonstrate a method for estimating 2-D velocity models from synthetic and real seismic reflection data in the framework of…
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2000
2000
Mixed-mode Bytecode Execution
Ole Agesen
,
David Detlefs
2000
Corpus ID: 12590970
Modern high-performance virtual machines use dynamic compilation. There is a tension between compilation speed and code quality…
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Highly Cited
1997
Highly Cited
1997
QSPR as a means of predicting and understanding chemical and physical properties in terms of structure
A. Katritzky
,
M. Karelson
,
V. Lobanov
1997
Corpus ID: 18958948
Abstract
1997
1997
Toward a Scalable Distributed {WWW} Server on Workstation Clusters
Daniel Andresen
,
Tao Yang
,
O. Ibarra
J. Parallel Distributed Comput.
1997
Corpus ID: 18956805
In this paper, we investigate the issues involved in developing a scalable World Wide Web (WWW) server called SWEB on a cluster…
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Highly Cited
1995
Highly Cited
1995
Computing without Clocks: Micropipelining the ARM Processor
S. Furber
1995
Corpus ID: 60899988
High-performance VLSI microprocessors are becoming very power hungry; this presents an increasing problem of heat removal in desk…
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1994
1994
Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications
J. Gaisler
Proceedings of IEEE 24th International Symposium…
1994
Corpus ID: 15293777
This paper describes the concurrent error-detection methods employed in the ERC32, a 32-bit processing core for embedded space…
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Highly Cited
1993
Highly Cited
1993
PHI - A Logic-Based Tool for Intelligent Help Systems
M. Bauer
,
Susanne Biundo-Stephan
,
D. Dengler
,
Jana Koehler
,
G. Paul
International Joint Conference on Artificial…
1993
Corpus ID: 6939927
We introduce a logic-based system which improves the performance of intelligent help systems by supplying them with plan…
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1993
1993
ES∗: An expert systems development planner using a constraint and rule-based approach
J. Lee
1993
Corpus ID: 59640976
1992
1992
Callee-save registers in continuation-passing style
A. Appel
,
Zhong Shao
LISP and Symbolic Computation
1992
Corpus ID: 32581794
Continuation-passing style (CPS) is a good abstract representation to use for compilation and optimization: it has a clean…
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Highly Cited
1985
Highly Cited
1985
Discovering Patterns in Sequences of Events
Thomas G. Dietterich
,
R. Michalski
Artificial Intelligence
1985
Corpus ID: 10560392
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