Skip to search formSkip to main content
You are currently offline. Some features of the site may not work correctly.

SPARC

Known as: Sun Sparc, SPARC International, SPARC (disambiguation) 
The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by… Expand
Wikipedia

Related topics

Related topics

50 relations
32-bitAfara WebsystemsBerkeley RISCBit numbering
Expand

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2018
Review
2018
Recent Trends and Long-standing Problems in Archaeological Remote Sensing
The variety and sophistication of data sources, sensors, and platforms employed in archaeological remote sensing have increased… Expand
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Highly Cited
2009
Highly Cited
2009
Rock: A High-Performance Sparc CMT Processor
Rock, Sun's third-generation chip-multithreading processor, contains 16 high-performance cores, each of which can support two… Expand
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Highly Cited
2005
Highly Cited
2005
Niagara: a 32-way multithreaded Sparc processor
The Niagara processor implements a thread-rich architecture designed to provide a high-performance solution for commercial server… Expand
  • table 1
  • figure 1
  • figure 2
  • figure 3
  • figure 4
Highly Cited
2003
Highly Cited
2003
Practical lock-freedom
Mutual-exclusion locks are currently the most popular mechanism for interpro-cess synchronisation, largely due to their apparent… Expand
  • figure 3.2
  • figure 3.4
  • figure 3.6
  • figure 3.7
  • figure 3.9
Highly Cited
2002
Highly Cited
2002
The case for institutional repositories : a SPARC position paper
Editor's Note:  In July, the Scholarly Publishing and Academic Resources Coalition (SPARC) released a major position paper that… Expand
  • table 1
  • table 2
Highly Cited
2002
Highly Cited
2002
A portable and fault-tolerant microprocessor based on the SPARC v8 architecture
  • J. Gaisler
  • Proceedings International Conference on…
  • 2002
    • Corpus ID: 16348372
The architecture and implementation of the LEON-FT processor is presented. LEON-FT is a fault-tolerant 32 bit processor based on… Expand
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • table 1
Highly Cited
1998
Highly Cited
1998
Shape-Based Retrieval: A Case Study With Trademark Image Databases
Abstract Retrieval efficiency and accuracy are two important issues in designing a content-based database retrieval system. We… Expand
  • figure 21
Highly Cited
1997
Highly Cited
1997
The SimpleScalar tool set, version 2.0
This document describes release 2.0 of the SimpleScalar tool set, a suite of free, publicly available simulation tools that offer… Expand
  • figure 1
  • figure 2
  • table 1
  • figure 3
  • figure 4
Highly Cited
1995
Highly Cited
1995
UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems
Uppaal is a tool suite for automatic verification of safety and bounded liveness properties of real-time systems modeled as… Expand
  • figure 1
  • figure 2
  • figure 3
  • table 1
  • figure 4
Highly Cited
1991
Highly Cited
1991
Graph drawing by force‐directed placement
We present a modification of the spring‐embedder model of Eades [Congressus Numerantium, 42, 149–160, (1984)] for drawing… Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy, Terms of Service, and Dataset License
ACCEPT & CONTINUE