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SPARC
Known as:
Sun Sparc
, SPARC International
, SPARC (disambiguation)
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The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by…
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Related topics
Related topics
50 relations
32-bit
Afara Websystems
Berkeley RISC
Bit numbering
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
A Novel Approach for Automatic Irrigation and Fertigation Using Embedded System
S. Devi
2014
Corpus ID: 55459650
This research paper portrays the automatic irrigation and fertigation using embedded system in the field of both plain and slope…
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2008
2008
Starting a New Scholarly Journal in Africa
K. Stranack
2008
Corpus ID: 73733429
2005
2005
Role and mission of academic libraries: Present and Future
Paula T. Kaufman
2005
Corpus ID: 59976713
I want to start this talk by referring to Pogo, an animal cartoon character that was very popular in the United States in the mid…
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2003
2003
BioOne: building a sustainable alternative publishing model for non‐profit publishers
H. Joseph
Learned Publishing
2003
Corpus ID: 13610799
An account is given of the difficulties caused to smaller learned publishers and to the academic library system in the move to…
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2000
2000
Memory Access Schemes for Configurable Processors
H. Lange
,
A. Koch
International Conference on Field-Programmable…
2000
Corpus ID: 17305922
This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface…
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1999
1999
Modeling and Formal Verification of the Fairisle ATM Switch Fabric Using MDG ’ s
S. Tahar
,
Xiaoyu Song
,
E. Cerny
,
Zijian Zhou
,
M. Langevin
,
Otmane Aı̈t-Mohamed
1999
Corpus ID: 15107291
In this paper, we present several techniques for modeling and formal verification of the Fairisle asynchronous transfer mode (ATM…
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1998
1998
ABSS v2.0: a SPARC Simulator
Dwight Sunada
,
D. Glasco
,
M. Flynn
1998
Corpus ID: 60399644
This paper describes various aspects of the augmentation-based SPARC simulator (ABSS). We discuss (1) the problems that we solved…
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1997
1997
Regular datapaths on field programmable gate arrays
A. Koch
1997
Corpus ID: 45354245
Field-Programmable Gate Arrays (FPGAs) are a recent kind of programmable logic device. They allow the implementation of…
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1996
1996
Knowledge-based view control of a neural 3-D object recognition system
Ulrich Büker
,
G. Hartmann
Proceedings of 13th International Conference on…
1996
Corpus ID: 1333077
The recognition of 3D objects is one of the most challenging goals in computer vision. In this paper we present a robot vision…
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1994
1994
Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications
J. Gaisler
Proceedings of IEEE 24th International Symposium…
1994
Corpus ID: 15293777
This paper describes the concurrent error-detection methods employed in the ERC32, a 32-bit processing core for embedded space…
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