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SPARC

Known as: Sun Sparc, SPARC International, SPARC (disambiguation) 
The Scalable Processor Architecture (SPARC) is a reduced instruction set computing (RISC) instruction set architecture (ISA) originally developed by… 
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Related topics

Related topics

50 relations
32-bitAfara WebsystemsBerkeley RISCBit numbering

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
SPARC64™ VIIIfx: Fujitsu's new generation octo core processor for PETA scale computing
Presents a collection of slides covering the following topics: SPARC64™ VIIIfx; octo core processor; PETA scale computing; high… 
2002
2002
Migration velocity analysis from locally coherent events in 2-D laterally heterogeneous media, Part II: Applications on synthetic and real data
We demonstrate a method for estimating 2-D velocity models from synthetic and real seismic reflection data in the framework of… 
2002
2002
The Sun Fireplane Interconnect
A computing system's internal interconnect is a key determiner of its cost, performance, and reliability. The Sun Fireplane… 
2000
2000
Evolutionary algorithms for the synthesis of embedded software
This paper addresses the problem of trading off between the minimization of program and data memory requirements of single… 
2000
2000
Memory Access Schemes for Configurable Processors
This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface… 
1999
1999
Modeling and Formal Verification of the Fairisle ATM Switch Fabric Using MDG ’ s
In this paper, we present several techniques for modeling and formal verification of the Fairisle asynchronous transfer mode (ATM… 
1999
1999
Database Requirement Analysis for a Third Generation Mobile Telecom System
The development of ever faster processors have made it possible to adapt database technology in controlling the telecom network… 
1997
1997
Toward a Scalable Distributed {WWW} Server on Workstation Clusters
In this paper, we investigate the issues involved in developing a scalable World Wide Web (WWW) server called SWEB on a cluster… 
1995
1995
Data-parallel C on a reconfigurable logic array
The existence of reconfigurable logic arrays has made it possible to create on the same physical hardware platform many different… 
1994
1994
Concurrent error-detection and modular fault-tolerance in a 32-bit processing core for embedded space flight applications
  • J. Gaisler
  • Proceedings of IEEE 24th International Symposium…
  • 1994
  • Corpus ID: 15293777
This paper describes the concurrent error-detection methods employed in the ERC32, a 32-bit processing core for embedded space… 
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