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SINADR

Known as: Sndr 
Signal-to-noise and distortion ratio (SINADR) is a measurement of the purity of a signal. SINADR is typically used in data converter specifications… 
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Related topics

Related topics

7 relations
Analog-to-digital converterDecibelDigital-to-analog converterDistortion

Broader (1)

Digital signal processing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Partial Relay Selection for Hybrid RF/FSO Systems with Hardware Impairments
In this paper, we investigate the performance analysis of dual hop relaying system consisting of asymmetric Radio Frequency (RF… 
Highly Cited
2012
Highly Cited
2012
Design Techniques for Wideband Single-Bit Continuous-Time $\Delta\Sigma$ Modulators With FIR Feedback DACs
We give design considerations for single-bit continuous-time Delta-Sigma modulators (CTDSMs) with FIR feedback DACs. These… 
2011
2011
TIME-INTERLEAVED DELTA-SIGMA MODULATOR FOR WIDEBAND DIGITAL GHz TRANSMITTERS DESIGN AND SDR APPLICATIONS
This paper presents a development of a wideband delta- sigma modulator for fully digital GHz transmitters. The fully digital RF… 
Highly Cited
2011
Highly Cited
2011
An 8.5 mW Continuous-Time $\Delta \Sigma $ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR
This paper presents a third order, single-loop, continuous-time ΔΣ modulator with an internal 4-bit quantizer. The modulator is… 
Highly Cited
2010
Highly Cited
2010
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber
This paper presents the design of an analog-front-end (AFE) integrated into a DSP-based transceiver for both serial 10 Gbps KR… 
2009
2009
A 100 MS/s 4 MHz Bandwidth 70 dB SNR $\Delta \Sigma$ ADC in 90 nm CMOS
This paper describes the results of an implementation of a high speed DeltaSigma ADC in 90 nm CMOS process, which is developed… 
Highly Cited
2008
Highly Cited
2008
An 11-Bit 45 MS/s Pipelined ADC With Rapid Calibration of DAC Errors in a Multibit Pipeline Stage
A technique to rapidly correct for both DAC and gain errors in the multibit first stage of an 11-bit pipelined ADC is presented… 
2006
2006
Force feedback linearization for higher-order electromechanical sigma–delta modulators
A higher-order electromechanical sigma–delta modulator can greatly improve the signal-to-noise ratio compared with a second-order… 
Highly Cited
2005
Highly Cited
2005
An implantable wireless bidirectional communication microstimulator for neuromuscular stimulation
This paper presents the integrated circuit design for a wireless bidirectional transmission microstimulator. This implantable… 
Highly Cited
2003
Highly Cited
2003
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS
The design and optimization of a high-speed low-voltage CMOS flash analog-to-digital converter (ADC) are presented. The… 
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