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SCPEP1 gene
Known as:
serine carboxypeptidase 1
, retinoid inducible serine carboxypeptidase
, SCPEP1
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National Institutes of Health
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Design & analysis of 16 bit RISC processor using low power pipelining
Priyank Trivedi
,
R. Tripathi
International Conference on Computing…
2015
Corpus ID: 15832498
A 16 bit low power pipelined RISC processor is proposed by us in this paper, the RISC processor consists of the block mainly ALU…
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2015
2015
Introducing RISC: A New Video Inventory for Testing Social Perception
K. Rothermich
,
M. Pell
PLoS ONE
2015
Corpus ID: 16651080
Indirect forms of speech, such as sarcasm, jocularity (joking), and ‘white lies’ told to spare another’s feelings, occur…
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2012
2012
Design and Performance Analysis of 8-bit RISC Processor using Xilinx Tool
R. Uma
2012
Corpus ID: 11827052
RISC or Reduced Instruction Set Computer is a design philosophy that has become a mainstream in Scientific and engineering…
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2011
2011
16-Bit RISC processor design for convolution application
Anand Nandakumar Shardul
International Conference on Recent Trends in…
2011
Corpus ID: 11888733
In this paper, we propose a 16-bit non-pipelined RISC processor, which is used for signal processing applications. The processor…
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2008
2008
A RISC CPU IP core
P. Ye
,
Chaodong Ling
International Conference on Anti-counterfeiting…
2008
Corpus ID: 16004340
This article describes the hardware design of a RISC CPU IP core whose instructions are compatible with the Microchip PIC16C6X…
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2005
2005
P-bodies take a RISC
E. Jabri
Nature Structural &Molecular Biology
2005
Corpus ID: 32372885
1. Raijmakers, R., Schilders, G. & Pruijn, G.J. Eur. J. Cell Biol. 83, 175–183 (2004). 2. Lorentzen, E., Walter, P., Fribourg, S…
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2001
2001
RISC system design in an FPGA
Jarrod D. Luker
,
Vinod
,
F’rasad
,
Bradley
Proceedings of the 44th IEEE Midwest Symposium…
2001
Corpus ID: 62479879
Known for their flexibility, Field Programmable Gate Arrays (FPGA) are widely used for ASIC emulation, glue-logic consolidation…
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1996
1996
A quad-issue out-of-order RISC CPU
J. Lotz
,
S. Naffziger
,
D. Kipp
IEEE International Solid-State Circuits…
1996
Corpus ID: 24167645
A 64 b 4-way superscalar PA-RISC microprocessor system operating from 150-250 MHz combines full out-of-order execution with low…
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1992
1992
RISC approach to design of fuzzy processor architecture
Hiroyuki Watanabe
[ Proceedings] IEEE International Conference on…
1992
Corpus ID: 60615811
An attempt is made to design a fuzzy information processor as an application-specific processor using a quantitative approach…
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1992
1992
A high speed superscalar PA-RISC processor
E. Delano
,
W. Walker
,
J. Yetter
,
M. Forsyth
Digest of Papers COMPCON Spring
1992
Corpus ID: 21611475
A novel processor implementing Hewlett-Packard's PA-RISC 1.1 (precision architecture-reduced instruction set computer) has been…
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