Chaodong Ling

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Based on the CSMC 0.6um 40V BCD process and the bandgap principle a reference circuit used in high voltage chip is designed. The simulation results show that a temperature coefficient of 26.5ppm/°C in the range of 3.5∼40V supply, the output voltage is insensitive to the power supply, when the supply voltage rages from 3.5∼40V, the(More)
In this paper, a wide-band CMOS inductor-less low noise amplifier (LNA) with active balun is presented, in which the noise-canceling technique is exploited to reduce the thermal noise of input transistor. The LNA combining with active balun can convert the single-ended RF signal into differential signals, so off-chip balun is not needed. Furthermore, the(More)
This paper introduces a design of slope compensation circuit for peak-current-mode boost DC-DC converter. The circuit is simple, and eliminates instability problem of the peak-current-mode system generated by double-loop control. And it avoided detrimental effects on account of improper compensation, such as slow transient response, low carrying capacity.(More)
This article describes the hardware design of a RISC CPU IP core whose instructions are compatible with the Microchip PIC16C6X-series of microcontrollers. In this paper, an 8-bit CPU based on RISC architecture is designed by Top-Down IC design method. The RISC CPU core is based on Harvard architecture with 14-bit instruction length and 8-bit data length and(More)
The principles of over-sampled ADC are discussed firstly, and then focus on the relation between the order of modulator, over sampling rate and resolution in this paper. This discrete domain sigma-delta modulator is implemented in the Matlab Simulink environment, and we provide the behavioral modeling and design flows. The proposed set of blocks takes into(More)
With the need of researching brain-computer interface (BCI), it is very important to design an ASIC for detecting EEG signal. The main blocks of the EEG acquisition chip includes one chopper-stabilized differential difference amplifier, low-pass filter, gain amplifier, non-overlapping clock generator, and band-gap voltage reference circuit etc. All the(More)
A solution for end-user of the portable telemedicine monitoring equipment has been proposed in this paper. The hardware design scheme adopts SOPC technology based on NIOS II processor. The system modules are implemented on Quartus II V6.0 and have been validated on Altera 1C20 development kit. This paper focuses on the development process of hardware(More)
The design of a low-pass elliptic filter basing on CSMC DPDM 0.6 mum CMOS model is presented. This filter can realize both low-pass and notch functions. The filter based on OTA-C structure is designed for the EEG detection. The simulation results based on the tool of Sprectre by Cadence Company show that the filter has desire pass-band and provides 58.5 dB(More)
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