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Register renaming

Known as: Issue queue, Remap file 
In computer architecture, register renaming is a technique that eliminates the false data dependencies arising from the reuse of architectural… Expand
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Papers overview

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Highly Cited
2009
Highly Cited
2009
Rapid adoption of virtualization technologies has led to increased utilization of physical resources, which are multiplexed among… Expand
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2006
2006
Static single assignment form (SSA) is a popular program intermediate representation (IR) for static analysis. SSA programs… Expand
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Highly Cited
2004
Highly Cited
2004
Multiple Clock Domain (MCD) processors are a promising future alternative to today's fully synchronous designs. Dynamic Voltage… Expand
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2003
2003
With faster CPU clocks and wider pipelines, all relevantmicroarchitecture components should scale accordingly.There have been… Expand
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Highly Cited
2001
Highly Cited
2001
Increasing power dissipation has become a major constraint for future performance gains in the design of microproces sors In this… Expand
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Highly Cited
2001
Highly Cited
2001
Techniques such as DPA and SPA can be used to find the secret keys stored in smart-cards. These techniques have caused concern… Expand
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Highly Cited
2000
Highly Cited
2000
Register renaming is a technique to remove false data dependencie-write after read (WAR) and write after write (WAW)-that occur… Expand
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2000
2000
Register file access time represents one of the critical delays of current microprocessors, and it is expected to become more… Expand
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Highly Cited
1996
Highly Cited
1996
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch… Expand
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1993
1993
Presents a novel microparallel taxonomy for machines with multiple-instruction processing capabilities including VLIW… Expand
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