A Novel Register Renaming Technique for Out-of-Order Processors

@article{Tabani2018ANR,
  title={A Novel Register Renaming Technique for Out-of-Order Processors},
  author={Hamid Tabani and Jose-Maria Arnau and Jordi Tubella and Antonio Gonz{\'a}lez},
  journal={2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)},
  year={2018},
  pages={259-270}
}
Modern superscalar processors support a large number of in-flight instructions, which requires sizeable register files. Conventional register renaming techniques allocate a new storage location, i.e. physical register, for every instruction whose destination is a logical register in order to remove false dependences. Physical registers are released in a… CONTINUE READING