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Register file

Known as: RF (disambiguation) 
A register file is an array of processor registers in a central processing unit (CPU). Modern integrated circuit-based register files are usually… 
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Related topics

Related topics

50 relations
AMD K6ARM architectureAlpha 21064Atmel AVR

Broader (2)

Computer architectureDigital electronics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC
A low-power and high-performance 4-way 32-bit stream processor core is developed for handheld low-power 3-D graphics systems. It… 
Highly Cited
2005
Highly Cited
2005
A Lower-Power Register File Based on Complementary Pass-Transistor Adiabatic Logic
This paper presents a novel low-power register file based on adiabatic logic. The register file consists of a storage-cell array… 
2004
2004
A Massively Multithreaded Packet Processor
Highly Cited
2003
Highly Cited
2003
Parallel 4/spl times/4 2D transform and inverse transform architecture for MPEG-4 AVC/H.264
Transform coding has been widely used in video coding standards. In this paper, a hardware architecture for accelerating… 
2002
2002
Loop fusion for clustered VLIW architectures
Embedded systems require maximum performance from a processor within significant constraints in power consumption and chip cost… 
2000
2000
Improved spill code generation for software pipelined loops
Software pipelining is a loop scheduling technique that extractsparallelism out of loops by overlapping the execution of… 
Highly Cited
1998
Highly Cited
1998
Clustered Instruction-Level Parallel Processors
VLIW, registers, clustering, compilers, EPIC, scheduling CPUs with a large amount of instruction-level parallelism must carry out… 
Highly Cited
1994
Highly Cited
1994
An integrated approach to retargetable code generation
Special-purpose instruction set processors (ISPs) challenge compilers because of instruction level parallelism, small numbers of… 
1993
1993
Speculative execution exception recovery using write-back suppression
One of the key design concerns of multiple instruction issue (MII) processors is deciding how many memory ports need to be… 
1964
1964
Serial-to-Parallel Transformation of Linear-Feedback Shift-Register Circuits
Linear-feedback shift-register circuits have been studied extenOE--Exclusive OR Gate sively.'-' These studies concentrated mainly… 
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