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Redundant binary representation

Known as: Redundant Binary 
A redundant binary representation (RBR) is a numeral system that uses more bits than needed to represent a single binary digit so that most numbers… 
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Related topics

Related topics

10 relations
AND gateArithmetic logic unitBinary numberBitwise operation

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Intelligence diagnosis system of pathological process with redundant training matrix
The method of infection diseases diagnosing is considered within the bounds of information-extreme intelligence technology, which… 
2011
2011
A fast final adder for a 54-bit parallel multiplier for DSP application
A novel redundant binary-to-natural binary converter circuit is proposed which is used in the final addition stage of parallel… 
2009
2009
Correcting the Normalization Shift of Redundant Binary Representations
An important problem in the realization of floating-point subtraction is the identification of the position of the first nonzero… 
2004
2004
A unified unsigned/signed binary multiplier
  • Guoping Wang
  • Conference Record of the Thirty-Eighth Asilomar…
  • 2004
  • Corpus ID: 43994723
Multiplication is a very important operation in digital computing systems. Both signed and unsigned multiplications are required… 
2002
2002
VLSI design using redundant binary number system : arithmetic components for floating-point datapath unit = 잉여 이진수 시스템을 이용한 VLSI 시스템 설계 : 부동소수점 연산기로의 적용
2001
2001
The implementation of an efficient and high-speed inner-product processor
A novel, high-performance fixed-point inner-product processor based on a redundant binary number system is presented. The… 
Highly Cited
1994
Highly Cited
1994
A high-performance CMOS redundant binary multiplication-and-accumulation (MAC) unit
This paper describes the design of a pipelined CMOS 16/spl times/16 redundant binary multiplication-and-accumulation (MAC) unit… 
1993
1993
A 8.8-ns 54/spl times/54-bit multiplier using new redundant binary architecture
A new redundant binary (RB) architecture for a high-speed multiplier is presented. In this architecture, a pair of partial… 
Highly Cited
1988
Highly Cited
1988
A 33 Mflops Floating Point Processor Using Redundant Binary Representation
A 33MFLOPS single precision floating point processor that uses the redundant binary representation in a multiplier (FMUL) and a… 
1972
1972
A Suggestion for a High-Speed Parallel Binary Divider
A family of four procedures to compute the inverse 1/X of a given binary number X normalized between 0.5 and 1 is described. The… 
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