RapidIO

Known as: SRIO, Serial RapidIO 
The RapidIO architecture is a high-performance packet-switched, interconnect technology. RapidIO supports messaging, read/write and cache coherency… (More)
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Topic mentions per year

Topic mentions per year

2001-2017
051020012017

Papers overview

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2010
2010
Packet switched networks are widely used for interconnecting distributed computing platforms. RapidIO (Rapid Input/Output) is an… (More)
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2010
2010
In this article, we study optimization of a RapidIO network and FPGA-based computation engines to address the taxing requirements… (More)
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2010
2010
RapidIO is an attractive interconnection technology due to its high performance and high reliability. In this paper, the design… (More)
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2010
2010
This work presents a low-power low-cost CDR design for RapidIO SerDes. The design is based on phase interpolator, which is… (More)
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2009
2009
In order to sovle an intra-system interface for chip-to-chip and board-to-board communications and meet the explosive demand for… (More)
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2007
2007
Space-based radar is a suite of applications that presents many unique system design challenges. In this paper, we investigate… (More)
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2006
2006
The RapidIO Data Streaming Logical layer has been designed to provide Segmentation and Reassembly (SAR) service to higher layer… (More)
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2004
2004
Space-Based Radar (SBR) processing is a processorand communication-intensive HPEC application that presents unique design… (More)
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2004
2004
RapidIO is an emerging standard for switched interconnection of processors and boards in embedded systems. We use discrete-event… (More)
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2001
2001
In this paper we describe the results of our simulation analysis of a high-performance processing architecture based on the… (More)
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