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Pipelining (DSP implementation)

Pipelining is an important technique used in several applications such as digital signal processing (DSP) systems, microprocessors, etc. It… 
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Related topics

Related topics

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Broader (1)

Digital signal processing
MicroprocessorParallel processing (DSP implementation)Unfolding (DSP implementation)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
An Efficient Exact Fused Dot Product Processor in FPGA
The objective of this work is to develop an efficient hardware processor to perform the fused dot product operation with full… 
2017
2017
High speed efficient advanced encryption standard implementation
Cryptography is the science of secure data transmission through an insecure channel. Advanced Encryption Standard (AES) is the… 
2011
2011
A pipelined 3-level bandpass delta-sigma modulator for class-S power amplifiers
A digital bandpass delta-sigma modulator for class-S power amplifiers is presented. In comparison to a 2-level modulator coding… 
2008
2008
A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic
A high speed and low power 8-bit carry-lookahead adder using two-phase modified dual-threshold voltage (dual-Vt) domino logic… 
2005
2005
A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining
We present a baseline MPEG-4 Advanced Video Coding (AVC) decoder based on the methodology of joint optimization of software and… 
2002
2002
Comparison of CORDIC algorithm implementations on FPGA families
This paper presents different implementations of CORDIC algorithm on two field programmable gate array (FPGA) families, namely… 
2000
2000
Single-chip tunable heterodyne notch filters implemented in FPGA's
Two single-chip designs implement in FPGA's a high-order tunable IIR notch filter using a new digital heterodyne technique. The… 
1998
1998
A Buffering Policy for Distributed Continuous Media Servers
Recent technological advances in computer, high-speed network, and data compression are accelerating the realization of media-on… 
Review
1994
Review
1994
Synchronous performance and reliability improvement in pipelined ASICs
The clock frequency of a synchronous circuit can be increased at the expense of increased system latency, area, and power using… 
Review
1984
Review
1984
Experience with pipelined multiple instruction streams
Pipelining has been used to implement efficient, high-speed vector computers. It is also an effective method for implementing… 
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