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Pipeline (computing)

Known as: Pipeline, Pipeline (computer), Pipe 
In computing, a pipeline is a set of data processing elements connected in series, where the output of one element is the input of the next one. The… 
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256-bitAIPSAMULET microprocessorARM architecture

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2009
Highly Cited
2009
A 1.8 V 1.0 GS/s 10b Self-Calibrating Unified-Folding-Interpolating ADC With 9.1 ENOB at Nyquist Frequency
An advance in folding-interpolating analog-to-digital converters (ADCs) is demonstrated which simplifies their extension to… 
Highly Cited
2008
Highly Cited
2008
An 11-Bit 45 MS/s Pipelined ADC With Rapid Calibration of DAC Errors in a Multibit Pipeline Stage
A technique to rapidly correct for both DAC and gain errors in the multibit first stage of an 11-bit pipelined ADC is presented… 
Highly Cited
2007
Highly Cited
2007
A Fast Mode Decision Algorithm and Its VLSI Design for H.264/AVC Intra-Prediction
In this paper, we present a fast mode decision algorithm and design its VLSI architecture for H.264 intra-prediction. A regular… 
Highly Cited
2006
Highly Cited
2006
Area-Efficient FIR Filter Design on FPGAs using Distributed Arithmetic
In this paper, a highly area-efficient multiplier-less FIR filter is presented. Distributed Arithmetic (DA) has been used to… 
Highly Cited
2006
Highly Cited
2006
RAPID PROTOTYPING - Area efficient FIR filters for high speed FPGA implementation
A new algorithm that synthesises multiplier blocks with low hardware requirement suitable for implementation as part of full… 
Highly Cited
1998
Highly Cited
1998
A low-power IDCT macrocell for MPEG2 MP@ML exploiting data distribution properties for minimal activity
This work describes the implementation of a low power IDCT chip targetted to medium and low bitrate applications. Our strategy… 
Highly Cited
1996
Highly Cited
1996
Module assignment for low power
We investigate the problem of minimizing the total power consumption during the binding of operations to functional units in a… 
Highly Cited
1987
Highly Cited
1987
Concurrent cellular VLSI adaptive filter architectures
Previous approaches to high-sampling-rate adaptive filter implementations have been based on word-level pipelined word-parallel… 
Highly Cited
1987
Highly Cited
1987
Parallel bit-level pipelined VLSI designs for high-speed signal processing
This paper explores the potential of bit-level pipelined VLSI for high-speed signal processing. We discuss issues involved in… 
Highly Cited
1983
Highly Cited
1983
Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees
In this paper we describe two interconnection networks for parallel processing, namely the orthogonal trees network and the… 
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