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PipeRench
Known as:
PipeRench Reconfigurable Computing Project
The PipeRench Reconfigurable Computing Project is a project from the Carnegie Mellon University intended to improve reconfigurable computing systems…
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Related topics
Related topics
3 relations
Hardware-assisted virtualization
Kilocore
Reconfigurable computing
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
2014 International Symposium on Computer Architecture Influential Paper Award; 2014 Maurice Wilkes Award Given to Ravi Rajwar
S. Keckler
,
D. Tullsen
IEEE Micro
2014
Corpus ID: 10525447
This column discusses two awards given in 2014: the International Symposium on Computer Architecture Influential Paper Award…
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2011
2011
An exploration of mechanisms for dynamic cryptographic instruction set extension
P. Grabher
,
J. Großschädl
,
+4 authors
M. Wójcik
Journal of Cryptographic Engineering
2011
Corpus ID: 1412503
Instruction set extensions (ISEs) supplement a host processor with special-purpose, typically fixed-function hardware components…
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2008
2008
Automatic contexts switch in loop pipeline for embedded coarse-grained reconfigurable processor
Sudong Yu
,
Leibo Liu
,
Shaojun Wei
International Conference on Communications…
2008
Corpus ID: 34065314
This paper proposes a novel technique of contexts (configure information) switch scheme in the loop pipeline, which effectively…
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2003
2003
Asynchronous PipeRench: architecture and performance evaluations
Hiroto Kagotani
,
H. Schmit
11th Annual IEEE Symposium on Field-Programmable…
2003
Corpus ID: 15461782
PipeRench is a configurable architecture that has the unique ability to virtualize an application using dynamic reconfiguration…
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2001
2001
Matching and searching analysis for parallel hardware implementation on FPGAs
Pablo Moisset
,
P. Diniz
,
Joonseok Park
Symposium on Field Programmable Gate Arrays
2001
Corpus ID: 9037992
Matching and searching computations play an important role in the indexing of data. These computations are typically encoded in…
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2000
2000
StReAm: object-oriented programming of stream architectures using PAM-Blox
O. Mencer
,
H. Hübert
,
M. Morf
,
M. Flynn
Proceedings IEEE Symposium on Field-Programmable…
2000
Corpus ID: 15820843
General-purpose microprocessors are designed to deliver low-latency computation with maximal clock frequencies, leading to high…
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2000
2000
Tunable fault tolerance for runtime reconfigurable architectures
Steven K. Sinha
,
P. Kamarchik
,
S. Goldstein
Proceedings IEEE Symposium on Field-Programmable…
2000
Corpus ID: 1909174
Fault tolerance is becoming an increasingly important issue, especially in mission-critical applications where data integrity is…
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Highly Cited
1999
Highly Cited
1999
Cameron: high level language compilation for reconfigurable systems
J. Hammes
,
Bob Rinker
,
W. Bohm
,
W. Najjar
,
B. Draper
,
R. Beveridge
International Conference on Parallel…
1999
Corpus ID: 2528806
This paper presents the Cameron Project, which aims to provide a high level, algorithmic language and optimizing compiler for the…
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Highly Cited
1999
Highly Cited
1999
A High-Performance Flexible Architecture for Cryptography
R. Taylor
,
S. Goldstein
Workshop on Cryptographic Hardware and Embedded…
1999
Corpus ID: 16509438
Cryptographic algorithms are more efficiently implemented in custom hardware than in software running on general-purpose…
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1998
1998
Tunable Fault Tolerance via Test and Reconfiguration
Shawn Blanton
,
S. Goldstein
,
H. Schmit
1998
Corpus ID: 61069152
The advent of reconfigurable hardware as a computing medium creates a multi-dimensional design space where trade-offs between…
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