Skip to search formSkip to main contentSkip to account menu

Open Verification Methodology

Known as: OVM 
The Open Verification Methodology (OVM) is a documented methodology with a supporting building-block library for the verification of semiconductor… 
Wikipedia (opens in a new tab)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
In theory, software product lines are planned in advance, using established engineering methods. However, there are cases where… 
2013
2013
IEEE 1149.1/1149.6 (JTAG) Verification IP provides a smart way to verify the IEEE 1149.1/1149.6 (JTAG) component of a SOC or an… 
2010
2010
Product Lines (PL) have proved an effective approach to reuse-based systems development. Several modeling languages were proposed… 
2010
2010
Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time… 
2009
2009
Synthetic polymers have been widely used in manufactured products because of their physical and chemical properties and low cost… 
2009
2009
Nowadays, Feature Models (FMs) are one of the most employed modelling language by managing variability in Software Product Lines… 
2008
2008
CICYT Proyects DEDALO (TIC2006-15175-C05-03, University of Murcia) and MEDWSA (TIC2006-15175-C05-02, Technical University of… 
2002
2002
Several standardisation initiatives recognised that content has value to both the user and the owner, and to ensure that this… 
2002
2002
For the simulation of traffic flows various macroscopic and microscopic models exist. Developing these models it is important to… 
2000
2000
Previous work has shown that the optimum MSE causal equalizer is IIR, with a number of poles equal to the channel order. We…