Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 237,985,130 papers from all fields of science
Search
Sign In
Create Free Account
Multi-master bus
Known as:
Multi master bus
, Multi-master architecture
, Multimaster bus
A multi-master bus is a computer bus in which there are multiple bus master nodes present on the bus.This is used when multiple nodes on the bus must…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
7 relations
Bus mastering
CAN bus
Central processing unit
Direct memory access
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2020
2020
IPv6 over Controller Area Network
A. Wachter
2020
Corpus ID: 208103601
Controller Area Network (CAN) is a fieldbus initially designed for automotive applications. It is a multi-master bus with 11-bit…
Expand
2018
2018
Analysis of Message Transmission Time Based on CAN Bus Stuffing Mechanism
Yu Liu
,
Yue Yin
2018
Corpus ID: 55069304
The main performance index in CAN bus is closely related to the transmission time (message length) of the transmission message…
Expand
2017
2017
Expected Completion Time Aware Message Scheduling for UM-BUS Interconnected System
Jiqin Zhou
,
Wei-gong Zhang
,
Keni Qiu
,
R. Bai
,
Y. Wang
,
Xiaoyan Zhu
IEEE Access
2017
Corpus ID: 13204539
Predictable message transmission is the primary requirement in networked safety critical embedded systems design. In these…
Expand
2013
2013
Controller Design for ISG Hybrid Electric Vehicle Based on SAE J 1939 Protocol
Liao Yongzhong
2013
Corpus ID: 56256863
During the design of IVECO ISG hybrid electric vehicles (HEVs), the ISG electrical propelling system was inserted into the Duling…
Expand
2006
2006
Analysis of Two on-Chip Buses for SOPC Design
He Zhan-zhuang
2006
Corpus ID: 63896086
Compare on-chip bus and traditional bus,introduce the simultaneous multi-master bus Architecture.Also,analyze the AMBA bus and…
Expand
2005
2005
Scalable bus interface for HSDPA co-processor extension
T. Takeuchi
,
H. Igura
,
T. Hashimoto
,
S. Tsumura
,
N. Nishi
Proceedings of the IEEE Custom Integrated…
2005
Corpus ID: 5673471
This paper presents a scalable bus developed for HSDPA co-processor extension of W-CDMA digital baseband processors. The use of…
Expand
2004
2004
A method for allocation of Buszugriffsrechten in multimaster bus systems, as well as multi-master bus system for carrying out the method
F. Hellwig
,
Dietmar König
2004
Corpus ID: 149463226
A method for allocation of Buszugriffsrechten in a multi master bus system (2) comprising the steps of: a) Unique assigning…
Expand
2004
2004
Method and apparatus for assigning Buszugriffsrechten in multimaster bus systems
F. Hellwig
,
D. König
2004
Corpus ID: 67431383
A method for allocation of Buszugriffsrechten in a multi master bus system (2) comprising the steps of: uniquely associating…
Expand
1999
1999
Multi-master bus system and method for operating same
A·温策尔
1999
Corpus ID: 69374263
It describes a multi-station bus system and method of operation. Characterized in that the determination may be dynamically…
Expand
1993
1993
Design of the software interface for a multimaster bus system
Jie Yang
1993
Corpus ID: 55392982
This work deals with the design and implementation of the software interface for the Small Computer System Interface (SCSI…
Expand