MOESI protocol

Known as: MOESI 
In computing, MOESI is a full cache coherency protocol that encompasses all of the possible states commonly used in other protocols. In addition to… (More)
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Topic mentions per year

Topic mentions per year

1986-2017
02419862017

Papers overview

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2016
2016
Data sharing is an important problem for manycore processor. Penalties of cache misses increase heavily on a larger NoC. In order… (More)
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2015
2015
Cache coherence protocol maintains data consistency between different cores / processors in a shared memory multi-core (MC… (More)
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2015
2015
Hierarchical clustered cache designs are becoming an appealing alternative for multicores. Grouping cores and their caches in… (More)
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2014
2014
To improve the efficiency of a processor to work with data, cache memories are used to compensate the latency delay to access… (More)
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2012
2012
The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. In this work, we… (More)
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Highly Cited
2006
Highly Cited
2006
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in… (More)
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2004
2004
In symmetric multiprocessors (SMPs), the cache coherence overhead and the speed of the shared buses limit the address/snoop… (More)
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Highly Cited
2003
Highly Cited
2003
We propose a new method for the parameterized verification of formal specifications of cache coherence protocols. The goal of… (More)
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1988
1988
  • Paul Sweazey
  • Digest of Papers. COMPCON Spring 88 Thirty-Third…
  • 1988
The use of a cache memory on the Futurebus is discussed. An explanation of how these memories work and of cache coherence is… (More)
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Highly Cited
1986
Highly Cited
1986
Standardization of a high performance blackplane bus, so that it can accommodate boards developed by different vendors, implies… (More)
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