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Logic simulation
Known as:
Functional simulation
, Function simulation
, Simulation (EDA)
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Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be…
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36 relations
Application-specific integrated circuit
Brian Silverman
Clock gating
Code coverage
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Resource-aware programming and simulation of MPSoC architectures through extension of X10
Frank Hannig
,
Sascha Roloff
,
G. Snelting
,
J. Teich
,
Andreas Zwinkau
Software and Compilers for Embedded Systems
2011
Corpus ID: 7462155
The efficient use of future MPSoCs with 1000 or more processor cores requires new means of resource-aware programming to deal…
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2009
2009
Soft Error Rates with Inertial and Logical Masking
Fan Wang
,
V. Agrawal
International Conference on VLSI Design
2009
Corpus ID: 8682866
We analyze the neutron induced soft error rate (SER). An induced error pulse is modeled by two parameters, probability of…
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2004
2004
SimSnap: fast-forwarding via native execution and application-level checkpointing
P. Szwed
,
Daniel Marques
,
Robert M. Buels
,
S. Mckee
,
M. Schulz
Eighth Workshop on Interaction between Compilers…
2004
Corpus ID: 7260013
As systems become more complex, conducting cycle-accurate simulation experiments becomes more time consuming. Most approaches to…
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1998
1998
Enhanced visibility and performance in functional verification by reconstruction
Joshua Marantz
Proceedings Design and Automation Conference…
1998
Corpus ID: 9025010
Cycle simulators, in-circuit emulators, and hardware accelerators have made it possible to rapidly model the functionality of…
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1995
1995
Emulation verification of the Motorola 68060
J. Kumar
,
N. Strader
,
J. Freeman
,
Michael Miller
Proceedings of ICCD '95 International Conference…
1995
Corpus ID: 32375406
Large-scale hardware logic emulation using software configurable hardware provides a new means to significantly improve…
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1994
1994
An associative memory architecture for concurrent production systems
J. N. Amaral
,
Joydeep Ghosh
Proceedings of IEEE International Conference on…
1994
Corpus ID: 15479991
This paper presents a novel parallel architecture for production systems. It relies on modern associative memory techniques to…
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1989
1989
STATE ASSIGNMENT FOR INITIALIZABLE SYNTHESIS
K. Cheng
,
V. Agrawal
1989
Corpus ID: 57839262
Previous work on automatic state assignment for finite state machines is primarily aimed at reducing the amount of logic in the…
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1985
1985
Concurrent Prolog as an Efficient VLSI Design Language
N. Suzuki
Computer
1985
Corpus ID: 18749982
As long as simulation is relied upon, the hardware will only be as good as the test data; therefore most widely used computers…
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1981
1981
FUNCTIONAL VERIFICATION IN AN INTERACTIVE SYMBOLIC IC DESIGN ENVIRONMENT
B. Ackland
,
N. Weste
1981
Corpus ID: 17340286
This paper describes verification techniques that have been implemented as part of an interactive symbolic IC design system…
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1980
1980
Verification of timing constraints on large digital systems
T. McWilliams
Design Automation Conference
1980
Corpus ID: 53235092
A new approach to the verification of the timing constraints on large digital systems has been developed. The associated…
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