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Logic gate
Known as:
Universal logic gate
, Electronic logic gates
, Logical gate
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In electronics, a logic gate is an idealized or physical device implementing a Boolean function; that is, it performs a logical operation on one or…
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Related topics
Related topics
50 relations
AND-OR-Invert
Application-specific integrated circuit
Arithmetic logic unit
Asymmetric C-element
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2004
Highly Cited
2004
Intelligible test techniques to support error-tolerance
M. Breuer
Asian Test Symposium
2004
Corpus ID: 1523448
We have developed a new digital system mode of operation, referred to as error-tolerance, the purpose of which is to increase…
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Highly Cited
2003
Highly Cited
2003
Absence of Strong Gate Effects in Electrical Measurements on Phenylene-Based Conjugated Molecules
Jeong-O Lee
,
G. Lientschnig
,
+6 authors
C. Dekker
2003
Corpus ID: 15534581
The electronic transport characteristics of self-assembled monolayers of phenylene-based -conjugated molecules were measured in a…
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Highly Cited
2000
Highly Cited
2000
A minimum total power methodology for projecting limits on CMOS GSI
A. Bhavnagarwala
,
B. Austin
,
K. Bowman
,
J. Meindl
IEEE Transactions on Very Large Scale Integration…
2000
Corpus ID: 31263914
A circuit design methodology minimizing total power drain of a static complementary metal-oxide-semiconductor (CMOS) random logic…
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Highly Cited
1993
Highly Cited
1993
Computation of floating mode delay in combinational circuits: theory and algorithms
S. Devadas
,
K. Keutzer
,
S. Malik
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1993
Corpus ID: 1983433
Addresses the problem of accurately computing the delay of a combinational logic circuit in the floating mode of operation. (In…
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Highly Cited
1992
Highly Cited
1992
Certified timing verification and the transition delay of a logic circuit
S. Devadas
,
K. Keutzer
,
S. Malik
,
Albert R. Wang
[] Proceedings 29th ACM/IEEE Design Automation…
1992
Corpus ID: 14425007
The transition delay of a circuit is examined. It is shown that the transition delay of a circuit can differ from the floating…
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Highly Cited
1986
Highly Cited
1986
Elimination of process-dependent clock skew in CMOS VLSI
M. Shoji
1986
Corpus ID: 62734278
Delays of two clock signals propagating along their respective CMOS logic circuit paths can be matched against all processing…
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Highly Cited
1979
Highly Cited
1979
Bipolar transistor design for optimized power-delay logic circuits
D. Tang
,
P. Solomon
1979
Corpus ID: 62239089
This design optimization scheme provides a procedure for tailoring the impurity doping profile of the transistor so that the…
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Highly Cited
1979
Highly Cited
1979
Bipolar circuit scaling
P. Solomon
,
D. Tang
IEEE International Solid-State Circuits…
1979
Corpus ID: 19933220
This presentation will cover scaling principles for bipolar logic circuits which involve coordinated shrinking of the transistor…
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Highly Cited
1976
Highly Cited
1976
Transition Count Testing of Combinational Logic Circuits
J. Hayes
IEEE transactions on computers
1976
Corpus ID: 206621034
Logic circuits are usually tested by applying a sequence of input patterns S to the circuit under test and comparing the observed…
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Review
1970
Review
1970
The metal-nitride-oxide-silicon (MNOS) transistor—Characteristics and applications
D. Frohman-Bentchkowsky
1970
Corpus ID: 62696369
Recent advances in silicon nitride deposition techniques have led to the emergence of the metal-nitride-oxide-silicon (MNOS…
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