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Leading zero
Known as:
Leading zeros
A leading zero is any 0 digit that comes before the first nonzero digit in a number string in positional notation. For example, James Bond's famous…
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Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Modular Design Of Fast Leading Zeros Counting Circuit
N. Milenkovic
,
V. Stankovic
,
M. Milic
2015
Corpus ID: 114082444
Abstract In modern computing technique, calculation of leading zeros in a data represented as strings of digits is used very…
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Highly Cited
2013
Highly Cited
2013
The interactive effects of conscientiousness, openness to experience, and political skill on job performance in complex jobs: The importance of context
G. Blickle
,
James A. Meurs
,
Andreas Wihler
,
C. Ewen
,
Andrea Plies
,
Susanne Günther
2013
Corpus ID: 21535197
Summary Caveats concerning the ability of personality to predict job performance have been raised because of seemingly modest…
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Highly Cited
2013
Highly Cited
2013
Is Bitcoin a Real Currency? An Economic Appraisal
D. Yermack
2013
Corpus ID: 167775065
A bona fide currency functions as a medium of exchange, a store of value, and a unit of account, but bitcoin largely fails to…
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2011
2011
Operand Width Aware Hardware Reuse: A low cost fault-tolerant approach to ALU design in embedded processors
M. Fazeli
,
Alireza Namazi
,
S. Miremadi
,
Alireza Haghdoost
Microelectron. Reliab.
2011
Corpus ID: 206947509
2010
2010
Quantitative evaluation of Compressed Sensing in MRI: Application to 7T time-of-flight angiography
J. Milles
,
M. Versluis
,
A. Webb
,
J. Reiber
Proceedings of the 10th IEEE International…
2010
Corpus ID: 15654146
Compressed Sensing is a recently developed technique that enables the reconstruction of sparsely sampled MR data, thus enabling…
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Highly Cited
2009
Highly Cited
2009
FPC: A High-Speed Compressor for Double-Precision Floating-Point Data
Martin Burtscher
,
P. Ratanaworabhan
IEEE Transactions on Computers
2009
Corpus ID: 5132658
Many scientific programs exchange large quantities of double-precision data between processing nodes and with mass storage…
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2008
2008
Dual-mode floating-point adder architectures
A. Akkas
J. Syst. Archit.
2008
Corpus ID: 36050050
2008
2008
Efficient implementation of log10 lookup table in FPGA
D. Seidner
IEEE International Conference on Microwaves…
2008
Corpus ID: 22384876
When implementing a mathematical function in h/w, we would like to minimize the required resources. This task is critical in FPGA…
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Highly Cited
2001
Highly Cited
2001
Leading zero anticipation and detection-a comparison of methods
M. Schmookler
,
K. Nowka
Proceedings 15th IEEE Symposium on Computer…
2001
Corpus ID: 14695789
Design of the leading zero anticipator (LZA) or detector (LZD) is pivotal to the normalization of results for addition and fused…
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1997
1997
Leading-zero anticipatory logics for fast floating addition with carry propagation signal
Tsin-Yuan Chang
,
Jing-Reng Huang
,
Shao-Sheng Yang
Proceedings of 40th Midwest Symposium on Circuits…
1997
Corpus ID: 62102790
A new leading zero anticipatory logic, that shares the carry propagation signals used in the FLP adder and can look ahead k bits…
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