Skip to search formSkip to main contentSkip to account menu

Kunle Olukotun

Oyekunle Ayinde (Kunle) Olukotun is a pioneer of multi-core processors, a professor of electrical engineering and computer science at Stanford… 
Wikipedia (opens in a new tab)

Related topics

Related topics

15 relations
Afara WebsystemsComputer engineeringComputer scienceDBL-Browser

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Train Model using Network Architecture and Log Records Trained Architecture N 2 . Predict Performance of Untrained Architecture
Using machine learning to analyze data often results in developer exhaust – code, logs, or metadata that do not de ne the… 
2015
2015
Area-Efficient Near-Associative Memories on FPGAs
Associative memories can map sparsely used keys to values with low latency but can incur heavy area overheads. The lack of… 
2012
2012
Proceedings of the 17th ACM SIGPLAN international conference on Functional programming
  • 2012
  • Corpus ID: 62166543
Review
2011
Review
2011
HPCS 2011 tutorials: Tutorial I: Distributed software transactional memories: Foundations, algorithms and tools
Parallel programming (PP) used to be an area once confined to scientific and high-performance computing applications. However… 
Review
2008
Review
2008
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
This volume consists of papers that were presented at the 20th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA… 
2003
2003
A Flexible , Efficient Concurrent Garbage Collector for Speculative Thread Processors
Michael Chen and Kunle Olukotun Computer Systems Lab, Stanford University Abstract In this paper, we introduce a novel garbage… 
2001
2001
High level compilation for gate reconfigurable architectures
A continuing exponential increase in the number of programmable elements is turning management of gate-reconfigurable… 
1996
1996
Expansion Caches For Superscalar Machines
Superscalar implementations improve performance by executing multiple instructions in parallel. This increases the demands on… 
1995
1995
The Benefits of Clustering in Shared Address Space Multiprocessors: An Applications-Driven Investigation
Clustering processors together at a level of the memory hierarchy in shared address space multiprocessors appears to be an… 
1993
1993
Specialized Caches To Improve Data Access Performance
High performance processor organizations place large demands on the data memory hierarchy. The data bandwidth requirements of a… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)