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JEDEC memory standards
The JEDEC memory standards are the specifications for semiconductor memory circuits and similar storage devices promulgated by the Joint Electron…
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Binary prefix
Byte
Gigabyte
Serial communication
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Semantic Scholar uses AI to extract papers important to this topic.
Review
2011
Review
2011
Issues of thermal testing of AC LEDs
A. Poppe
,
B. Siegal
,
G. Farkas
Annual IEEE Semiconductor Thermal Measurement and…
2011
Corpus ID: 45633691
In this paper we aim at highlighting different aspects of thermal testing of AC LEDs, especially of retrofit LED lamps which are…
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2010
2010
Study on board level solder joints reliability analysis of the copper stud bump flip-chip
W. Mu
,
Dejian Zhou
,
Zhaohua Wu
11th International Conference on Electronic…
2010
Corpus ID: 43538564
In this paper, the investigation focuses on the copper stud bump solder joint thermal-mechanical reliability. The copper stud…
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2010
2010
Corrosion protection of anisotropically conductive adhesive joined flip chips
K. Kokko
,
A. Parviainen
,
L. Frisk
Microelectronics and reliability
2010
Corpus ID: 461179
2009
2009
Standards, Intellectual Property Disclosure, and Patent Royalties after Rambus
S. Besen
,
R. Levinson
2009
Corpus ID: 55753013
2008
2008
Study of JEDEC B-condition JESD22-B111 standard for drop test reliability of Chip Scale Packages
Y. Bentata
,
S. Forster
,
K. Goh
,
H. Frémont
International Conference on Thermal, Mechanial…
2008
Corpus ID: 16098187
The general tendency of the portable handheld electronic is to integrate more and more functionalities (phone, audio, video…
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2007
2007
Strategic Networking in Standard Setting Organizations: The Case of JEDEC
Jonathan Church
2007
Corpus ID: 53408382
This paper examines the strategic impact of networking within a cooperative standard-setting body. The JEDEC JC-42 committee sets…
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2007
2007
Advantage and challenge of coreless flip-chip BGA
E. Lin
,
D. Chang
,
D. Jiang
,
Y. Wang
,
C. Hsiao
International Microsystems, Packaging, Assembly…
2007
Corpus ID: 23380478
This paper described the shadow moire measurement of bare flip chip coreless and standard (3/2/3) BGA substrate to inspect the…
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2007
2007
Analysis of ESD protection structure behaviour after ageing as new approach for system level reliability of automotive power devices
M. Goroll
,
W. Kanert
,
R. Pufall
,
S. Aresu
Microelectronics and reliability
2007
Corpus ID: 36815720
2006
2006
RoHS Implementation Challenges
Thomas F. Ellison
,
J. Szabo
2006
Corpus ID: 43841996
Implementation of the RoHS presents special challenges for small and medium sized companies. Limited staff and dependence on…
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1999
1999
Issues concerning CDM ESD verification modules-the need to move to alumina
L. G. Henry
,
M. Kelly
,
T. Diep
,
J. Barth
Electrical Overstress/Electrostatic Discharge…
1999
Corpus ID: 17979864
In this work, we demonstrate that both capacitance and inductance must be the central parameters associated with the charged…
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