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Interrupt priority level
Known as:
IPL
The interrupt priority level (IPL) is a part of the current system interrupt state, which indicates the interrupt requests that will currently be…
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Related topics
Related topics
13 relations
Control register
DEC Alpha
Honeywell Level 6
Interrupt
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Broader (1)
OpenVMS
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Review
2015
Review
2015
Analyzing the effects of dynamic task allocation on human-automation system performance
A. Johnson
2015
Corpus ID: 109396504
Modem complex aerospace systems employ flight deck automation to increase the efficiency and safety of systems while reducing…
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2014
2014
Monitoring method and computer device
哲雄 鈴木
,
哲雄 鈴木
2014
Corpus ID: 58617614
The present invention enables the problem of processing load during each processing task to be reliably and easily ascertained…
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2013
2013
Task Scheduling Algorithm in Grid Environment Based on Duplication and Insertion
Li-Jun Cao
,
Xi-Yin Liu
,
Torkel Hans-Georg Hans-Georg
,
Zhongping Zhang
Journal of Software
2013
Corpus ID: 15104736
Grid resource scheduling theory involving basic theoretical knowledge for grid scheduling was discussed in this paper. Then an…
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2013
2013
Systems and methods for processing apparatus having different modes of execution
斯特凡·舍恩费尔特
,
于尔根·黑尔姆施密特
,
法比奥·帕罗迪
,
塞尔吉奥·罗西
2013
Corpus ID: 64548832
The present invention provides a system and method for performing processing apparatus having different modes of operation of a…
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2009
2009
Space Augmentation and Task Priority Strategy Closed-Loop Inverse Kinematics Schemes for Constrained Redundant Manipulators with Task
P. Chiacchio
,
S. Chiaverini
,
L. Sciavicco
,
B. Siciliano
2009
Corpus ID: 123941773
Abstract This article presents new closed-loop schemes for solving the inverse kinematics of constrained redundant manipula- tors…
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2008
2008
A Method on Seting of Multilevel Interrupt Priority Level and Realizing More Interrupt Nesting with Software for AT89C51 Single Chip Micro-computer
Chuan-Hong Li
2008
Corpus ID: 63568112
A method on of multilevel interrupt priority level and realizing more interrupt nesting for AT89C51 single chip Micro-computer…
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2008
2008
Study on Task Priority for Multi-Satellite TT&C Scheduling
Xiao-Dong Ling
,
Xiao-Yue Wu
2008
Corpus ID: 64423661
Based on the engineering requirement analysis of Multi-Satellite TTC Scheduling, ten influence factors of TTC task priority were…
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2006
2006
Methodology for System Partitioning of Chip-Level Multiprocessor Systems
W. Brunnbauer
2006
Corpus ID: 64897956
In this thesis, constructive heursitics based on List Scheduling are developed for the HW/SW partitioning of process graphs which…
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2005
2005
The Distracted Driver: Modeling the Impact of Information Bandwidth, in -Vehicle Task Priority, and Spatial -Separation on Driver Performance and Attention Allocation
W. Horrey
2005
Corpus ID: 64210124
2000
2000
Serial bus messaging protocol with priority interrupt
M. Jackson
,
E. Husen
2000
Corpus ID: 67021812