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Interrupt latency

In computing, interrupt latency is the time that elapses from when an interrupt is generated to when the source of the interrupt is serviced. For… 
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Related topics

Related topics

27 relations
Advanced Programmable Interrupt ControllerComputer architectureComputer performanceControl system

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2014
Highly Cited
2014
Low-Latency Successive-Cancellation Polar Decoder Architectures Using 2-Bit Decoding
Polar codes have emerged as important error correction codes due to their capacity-achieving property. Successive cancellation… 
Highly Cited
2013
Highly Cited
2013
Green-energy Aware and Latency Aware user associations in heterogeneous cellular networks
  • T. HanN. Ansari
  • IEEE Globecom Workshops (GC Wkshps)
  • 2013
  • Corpus ID: 25843479
Green communications has received much attention recently. For cellular networks, the base stations (BSs) account for more than… 
Review
2008
Review
2008
Survey of position based routing for Inter Vehicle Communication system
  • C. TeeA. Lee
  • First International Conference on Distributed…
  • 2008
  • Corpus ID: 16178890
The emergence of vehicular ad-hoc network (VANET) through inter-vehicle communications (IVC) has promised countless applications… 
Highly Cited
2007
Highly Cited
2007
PERFORMANCE ANALYSIS OF THE IEEE 802.15.4 BASED ECG MONITORING NETWORK
The integration of biomedical sensors with wireless network technology may have great potentials in medical applications. In this… 
Highly Cited
2007
Highly Cited
2007
Low-Latency Handoffs in Mobile IPv4
Mobile IPv4 describes how a Mobile Node can perform IP-layer handoffs between subnets served by different Foreign Agents. In… 
Highly Cited
2006
Highly Cited
2006
A Fast Handoff Mechanism for IEEE 802.11 and IAPP Networks
Handoff is a critical issue in IEEE 802.11-based wireless networks. In this paper we propose a fast and seamless handoff solution… 
Highly Cited
2005
Highly Cited
2005
Building Predictable Systems on Chip: An Analysis of Guaranteed Communication in the Aethereal Network on Chip
As the complexity of Systems-on-Chip (SoC) is growing, meeting real-time requirements is becoming increasingly difficult… 
Highly Cited
2004
Highly Cited
2004
Bridging concurrent and non-concurrent error detection in FIR filters
Maintaining high reliability in fault detection is a prominent concern in case of life critical missions. In this paper, we… 
Highly Cited
1995
Highly Cited
1995
The Effects of Latency, Occupancy, and Bandwidth in Distributed Shared Memory Multiprocessors
Distributed shared memory (DSM) machines can be characterized by four parameters, based on a slightly modified version of the… 
Highly Cited
1983
Highly Cited
1983
Sensitivity to ultrasound in an identified auditory interneuron in the cricket: a possible neural link to phonotactic behavior
Summary1.In the cricket,Teleogryllus oceanicns, an identified auditory interneuron, interneuron-1 (int-1), is described… 
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