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Intel Core (microarchitecture)

Known as: Intel Core microarchitecture, Intel Core 2 Solo ULV, Intel Core Architecture 
The Intel Core microarchitecture (previously known as the Next-Generation Micro-Architecture) is a multi-core processor microarchitecture unveiled by… 
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BIOSCPU cacheCPU power dissipationCPUID

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
CIVSched: A Communication-Aware Inter-VM Scheduling Technique for Decreased Network Latency between Co-Located VMs
Server consolidation in cloud computing environments makes it possible for multiple servers or desktops to run on a single… 
2013
2013
Design and analysis of schedules for virtual network migration
The Internet faces well-known challenges in realizing modifications to the core architecture. To help overcome these limitations… 
2012
2012
Bahurupi: A polymorphic heterogeneous multi-core architecture
Computing systems have made an irreversible transition towards parallel architectures with the emergence of multi-cores. Moreover… 
2011
2011
Designing fast architecture-sensitive tree search on modern multicore/many-core processors
In-memory tree structured index search is a fundamental database operation. Modern processors provide tremendous computing power… 
2010
2010
Multi-core and SIMD architecture based implementation of recursive digital filtering algorithms
Implementation of recursive filtering equations using parallel computer architecture is difficult because of the dependency… 
2009
2009
Architectural support for cilk computations on many-core architectures
Future generations of high performance processors have the potential to integrate tens to hundreds of processing cores in a… 
2009
2009
Adaptive Multi-versioning for OpenMP Parallelization via Machine Learning
The introduction of multi-core architectures generates a higher demand for parallelism in order to fully exploit the potential of… 
2009
2009
Parallel data-locality aware stencil computations on modern micro-architectures
Novel micro-architectures including the Cell Broadband Engine Architecture and graphics processing units are attractive platforms… 
Highly Cited
2004
Highly Cited
2004
A 0.18 /spl mu/m 3.0 V 64 Mb non-volatile phase-transition random-access memory (PRAM)
A non-volatile 64 Mb phase-transition RAM is developed by fully integrating a chalcogenide alloy GST (Ge/sub 2/Sb/sub 2/Te/sub 5… 
2001
2001
Frame-level pipelined motion estimation array processor
A systolic motion estimation processor (MEP) core architecture implementing the full-search block-matching (FSBM) algorithm is… 
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