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Instruction selection

Known as: Lowest common denominator (computers) 
In computer science, instruction selection is the stage of a compiler backend that transforms its tree-based middle-level intermediate representation… Expand
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Related topics

Related topics

15 relations
Assembly languageCode generation (compiler)CompilerComputer science
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection
Custom-instruction selection is an essential phase in custom-instruction generation. It determines the most profitable custom… Expand
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2008
2008
Near-optimal instruction selection on dags
Instruction selection is a key component of code generation. High quality instruction selection is of particular importance in… Expand
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2006
2006
Combining Algorithm Exploration with Instruction Set Design: A Case Study in Elliptic Curve Cryptography
In recent years, processor customization has matured to become a trusted way of achieving high performance with limited cost… Expand
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Highly Cited
2003
Highly Cited
2003
Automatic application-specific instruction-set extensions under microarchitectural constraints
Many commercial processors now offer the possibility of extending their instruction set for a specific application - that is, to… Expand
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2002
2002
Rewriting Strategies for Instruction Selection
Instruction selection (mapping IR trees to machine instructions) can be expressed by means of rewrite rules. Typically, such sets… Expand
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1999
1999
Dependence Analysis for Java
We describe a novel approach to performing data dependence analysis for Java in the presence of Java's "non-traditional" language… Expand
Highly Cited
1998
Highly Cited
1998
Instruction Assignment for Clustered VLIW DSP Compilers: A New Approach
This report proposes a new heuristic/model driven approach to assign nodes of a computational DAG to clusters for a VLIW machine… Expand
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Highly Cited
1998
Highly Cited
1998
Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator
The AVIV retargetable code generator produces optimized machine code for target processors with different instruction set… Expand
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Highly Cited
1996
Highly Cited
1996
Instruction selection for embedded DSPs with complex instructions
We address the problem of instruction selection in code generation for embedded digital signal processors. Recent work has shown… Expand
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Highly Cited
1994
Highly Cited
1994
Instruction set definition and instruction selection for ASIPs
Application Specific Instruction set Processors (ASIPs) are field or mask programmable processors of which the architecture and… Expand
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