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Genlock
Known as:
Genlocked
, Genlocking
, Generator locking
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Genlock (generator locking) is a common technique where the video output of one source, or a specific reference signal from a signal generator, is…
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Related topics
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37 relations
Acorn Archimedes
Amiga Advanced Architecture chipset
Amiga video connector
AmigaOS
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Broader (1)
Broadcast engineering
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
FPGA-based image combiner for parallel rendering
M. Winzker
,
A. Schwandt
,
André Hinkenjann
,
Jens Maiero
,
Matthias Bues
International Conference on Signal and Image…
2011
Corpus ID: 16394426
Rendering of virtual scenes is an application that still demands higher computing power for more complex and more realistic…
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2008
2008
ACCURACY OF THE SOFTWARE GENLOCK WITH DIGITAL CAMCORDERS
Y. Kwon
,
Sukhoon Yoon
,
Rak-Joon Sung
2008
Corpus ID: 59847783
Recently, digital camcorders have gained popularity as a viable means of recording movements in video motion analysis, mainly due…
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2008
2008
Coaching and Sports Performance 533 KINEMATIC ANALYSIS OF TENNIS VOLLEY
Hsiao-Wen Chao
,
Chen-Fu Huang
,
Hsiao-Han Chao
,
Yu-Da Chen
,
Gin-Chang Liu
2008
Corpus ID: 55915113
The purpose of this study was to examine selected kinematic variables of the tennis volley. Fifteen skilled tennis players…
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2008
2008
A 3D ANALYSIS OF THE VOllEYBAll SPIKE
Lin-Huan Hu
,
Yung-hsiang Chen
,
Chen-Fu Huang
2008
Corpus ID: 56189982
The purpose of this study was to identify and describe the biomechanical characteristics of the high school volleyball players…
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2006
2006
WinSGL: software genlocking for cost-effective display synchronization under microsoft windows
Michael Waschbüsch
,
D. Cotting
,
M. Duller
,
Markus H. Gross
Eurographics Symposium on Parallel Graphics and…
2006
Corpus ID: 16615118
This paper presents the first software genlocking approach for unmodified Microsoft Windows systems, requiring no specialized…
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2004
2004
An ADPLL circuit using a DDPS for genlock applications
D. Calbaza
,
Ioan Cordos
,
N. Seth-Smith
,
Y. Savaria
IEEE International Symposium on Circuits and…
2004
Corpus ID: 11882958
This paper presents a fully programmable All-Digital PLL (ADPLL) circuit that is able to synchronize any frequency between 12 MHz…
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2002
2002
INTERACTION BETWEEN THE POLE AND THE HUMAN BODY AND ITS EFFECT ON THE POLE VAULTING PERFORMANCE
A. Arampatzis
,
F. Schade
,
G. Brüggemann
2002
Corpus ID: 111283965
The purposes of this study were: (a) to examine the utilization of pole elasticity by the athletes through muscular work and to…
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2001
2001
Genlock and Timing Regeneration for Multiple Formats of High-Definition Video and Digital Cinema
M. Poimboeuf
2001
Corpus ID: 62145050
For high-definition video and film, both symmetric (1-to-1) and asymmetric combinations of sources and timings are used for…
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2000
2000
A multiformat HDTV camera head
P. Centen
,
T. Moelands
,
J. V. Rooy
,
M. Stekelenburg
2000
Corpus ID: 14893975
This paper describes the development of a compact and configurable HDTV camera system for various studio and in-field…
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1987
1987
The Usable Intersection of PC Graphics and NTSC Video Recording
T. DeFanti
,
D. Sandin
,
Maxine D. Brown
IEEE Computer Graphics and Applications
1987
Corpus ID: 1912184
There are many reasons for users of computer graphics to want to distribute and/or record their output on standard television…
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