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Futurebus
Known as:
IEEE 896
Futurebus (IEEE 896) is a computer bus standard, intended to replace all local bus connections in a computer, including the CPU, memory, plug-in…
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Related topics
Related topics
19 relations
Asynchronous serial communication
Bus (computing)
Central processing unit
DEC 4000 AXP
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
1997
1997
Symbolic Techniques for Formally Verifying Industrial Systems
S. Campos
,
E. Clarke
,
M. Minea
Science of Computer Programming
1997
Corpus ID: 16613102
1996
1996
HIPPI: What is it, where did it come from, and where is it going?
D. Tolmie
1996
Corpus ID: 62625017
The first commercial High-Performance Parallel Interface (HIPPI) equipment was delivered in 1988, and HIPPI is the current…
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1995
1995
A Performance Evaluation of the Multiprocessor Testbed ATTEMPT-0
T. Terasawa
,
O. Yamamoto
,
T. Kudoh
,
H. Amano
Parallel Computing
1995
Corpus ID: 18634685
1994
1994
RD24 status report : application of the scalable coherent interface to data acquisition at LHC
A. Bogaerts
,
C. Fernandes
,
M. Liebhart
,
R. Keyser
,
Y. Ermoline
1994
Corpus ID: 13406704
An apparatus and a method for the separation of seeds from seed-containing fruit rag or the like, particularly the separation of…
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1993
1993
A performance analysis for the arbitor of IEEE standard backplane bus Futurebus/Futurebus+
O. Yamamoto
,
T. Takemoto
,
T. Kimura
,
H. Amano
Proceedings of IEEE Pacific Rim Conference on…
1993
Corpus ID: 56583151
The arbitration protocols of the IEEE Futurebus and Futurebus+ are analyzed with both a theoretical model and a real machine…
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1992
1992
Futurebus+ as an 1/0 Bus: Profile B
Barbara P. Aichinger
1992
Corpus ID: 62426148
The IEEE Futurebus+ is a very fast (3GBlsec.), industry standard backplane bus specification for computer systems. Futurebus+ was…
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1988
1988
VLSI support for copyback caching protocols on Futurebus
P. Sweazey
Conference on Advanced Research in VLSI
1988
Corpus ID: 60745854
The author discusses the nature of the superset of copyback cache protocols described by the MOESI state model, the superset bus…
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1987
1987
Improved Control Acquisition Scheme for the IEEE 896 Futurebus
D. M. Taub
IEEE Micro
1987
Corpus ID: 2823590
An added preemption facility clearly improves earlier schemes for implementing this backplane bus used with 32-bit…
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1984
1984
An Advanced Communication Protocol for the Proposed IEEE 896 Futurebus
P. Borrill
,
John Theus
IEEE Micro
1984
Corpus ID: 9399681
With its asynchronous protocol, the proposed IEEE 896 Futurebus achieves an extended design life, unequaled performance, and…
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1983
1983
Data Format and Bus Compatibility in Multiprocessors
H. Kirrmann
IEEE Micro
1983
Corpus ID: 21093907
Which end of the data egg gets broken first¿big or little? Do you start with the MSB or the LSB? For the proposed IEEE 896 bus…
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