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Flash ADC
Known as:
Fadc
, Flash converter
A flash ADC (also known as a direct-conversion ADC) is a type of analog-to-digital converter that uses a linear voltage ladder with a comparator at…
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Related topics
Related topics
18 relations
Amplifier
Analog-to-digital converter
CMOS
Comparator
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
A Novel 10-Bit 2.8-mW TDC Design Using SAR With Continuous Disassembly Algorithm
Karim O. Ragab
,
H. Mostafa
,
A. Eladawy
IEEE Transactions on Circuits and Systems - II…
2016
Corpus ID: 6163859
This brief introduces a successive approximation time-to-digital converter based on a novel algorithm denoted as successive…
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2014
2014
A 7.65-mW 5-bit 90-nm 1-Gs/s Folded Interpolated ADC Without Calibration
S. D’Amico
,
G. Cocciolo
,
A. Spagnolo
,
M. Matteis
,
A. Baschirotto
IEEE Transactions on Instrumentation and…
2014
Corpus ID: 27535632
Power consumption of high-speed low-resolution analog-to-digital converters (ADCs) can be reduced by means of calibration…
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2011
2011
Design of a Low Power, High Speed Complementary Input Folded Regulated Cascode OTA for a Parallel Pipeline ADC
M. K. Hati
,
T. K. Bhattacharyya
IEEE Computer Society Annual Symposium on VLSI
2011
Corpus ID: 6018860
This paper presents a low-power, high speed complementary input folded regulated cascode operational transconductance amplifier…
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2010
2010
A Novel, Variable Resolution Flash ADC with Sub Flash Architecture
Mahesh Kumar Adimulam
,
S. Veeramachaneni
,
N. Muthukrishnan
,
M. Srinivas
IEEE Computer Society Annual Symposium on VLSI
2010
Corpus ID: 12884754
In this paper, a design for low power flash ADC with configurable resolution is proposed. A novel sub flash architecture is…
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2009
2009
A 6b 3GS/s flash ADC with background calibration
Masashi Kijima
,
Kenji Ito
,
K. Kamei
,
Sanroku Tsukamoto
IEEE Custom Integrated Circuits Conference
2009
Corpus ID: 15764099
A 6b 3GS/s flash ADC is implemented in a 90nm CMOS process. The proposed ADC is based on an interpolating flash architecture…
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Review
2007
Review
2007
Study of the performance and capability of the new ultra-fast 2 GSample/s FADC data acquisition system of the MAGIC telescope
D. Tescaro
,
H. Bartko
,
+9 authors
H. Germany
2007
Corpus ID: 17317912
In February 2007 the MAGIC Air Cherenkov Telescope for gamma-ray astronomy was fully upgraded with an ultra fast 2 GSamples/s…
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2004
2004
An 8b 600MS/s 200mW CMOS folding A/D converter using an amplifier preset technique
G. Geelen
,
Edward J. F. Paulus
IEEE International Solid-State Circuits…
2004
Corpus ID: 10543198
An 8b CMOS folding ADC with resistive averaging and interpolation exhibits 7.5 ENOB and a maximum sample frequency of 600MS/s…
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Highly Cited
2003
Highly Cited
2003
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS
K. Uyttenhove
,
M. Steyaert
IEEE J. Solid State Circuits
2003
Corpus ID: 61079666
The design and optimization of a high-speed low-voltage CMOS flash analog-to-digital converter (ADC) are presented. The…
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1998
1998
A 200-MSPS 6-bit flash ADC in 0.6-/spl mu/m CMOS
D. Dalton
,
G. Spalding
,
+4 authors
P. Griffin
1998
Corpus ID: 56517544
This paper describes a 6-bit flash analog-to-digital converter (ADC) which performs the sampling function in a partial-response…
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1984
1984
New Developments in Flash ADC's
S. Dhawan
,
K. Kondo
IEEE Transactions on Nuclear Science
1984
Corpus ID: 37217023
A new generation of Flash Analog to Digital Converters (FADC) is being designed by European, Japanese and U.S. companies. The…
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