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Effective number of bits

Known as: ENOB 
Effective number of bits (ENOB) is a measure of the dynamic range of an analog-to-digital converter (ADC) and its associated circuitry. The… 
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Related topics

Related topics

9 relations
Analog-to-digital converterDigital-to-analog converterDistortionDynamic range

Broader (1)

Digital signal processing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
An 8-bit 100-GS/s distributed DAC in 28-nm CMOS
An 8-bit 100-GS/s digital-to-analog converter (DAC) using a distributed output topology in 28-nm low-power CMOS is presented. The… 
2013
2013
A 5GS/s 4-bit time-based single-channel CMOS ADC for radio astronomy
A 4-bit 65nm time-based analog-to-digital converter (ADC) targeting the next-generation Square Kilometre Array (SKA) is presented… 
2012
2012
1-1-1 MASH $\Delta \Sigma$ Time-to-Digital Converters With 6 ps Resolution and Third-Order Noise-Shaping
Two 1-1-1 MASH ΔΣ time-to-digital converters (TDCs) are presented in this paper. Third-order time domain noise-shaping has been… 
2009
2009
A 1 GHz Bandwidth Low-Pass $\Delta \Sigma$ ADC With 20–50 GHz Adjustable Sampling Rate
A low-pass continuous-time delta-sigma data converter with adjustable sampling rate from 20-50 GS/s has been demonstrated in a… 
2009
2009
A 6b 3GS/s flash ADC with background calibration
A 6b 3GS/s flash ADC is implemented in a 90nm CMOS process. The proposed ADC is based on an interpolating flash architecture… 
Highly Cited
2008
Highly Cited
2008
A 6-Bit 1.6-GS/<emphasis emphasistype="roman">s</emphasis> Low-Power Wideband Flash ADC Converter in 0.13-<formula formulatype="inline"><tex Notation="TeX">$\mu$</tex> </formula><emphasis…
In this work, a new termination technique for the averaging network of the flash analog-to-digital converter (ADC) input… 
Highly Cited
2007
Highly Cited
2007
A Low-Noise 40-GS/s Continuous-Time Bandpass $\Delta\Sigma$ ADC Centered at 2 GHz for Direct Sampling Receivers
This paper presents a 40-GS/s continuous-time bandpass DeltaSigma analog-to-digital converter centered at 2 GHz for wireless base… 
2005
2005
A 4-bit 5 GS/s flash A/D converter in 0.18 /spl mu/m CMOS
A 4-bit 5 GS/s flash analog-to-digital converter (ADC) is designed and simulated in a 0.18 /spl mu/m CMOS technology. Low-swing… 
2004
2004
A 1.8V 1.6GS/s 8b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency
A 1.8V folding-interpolating ADC in 0.18/spl mu/m CMOS uses small device sizes to achieve a conversion rate exceeding 1.6GS/s… 
1999
1999
A 75 mW 10 b 20 MSample/s CMOS subranging ADC with 59 dB SNDR
In a two-step CMOS subranging ADC (CSA), a coarse comparator bank determines which subset of fine reference taps from a resistor… 
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