# Double-precision floating-point format

## Papers overview

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2016

2016

- 2016

A floating-point unit (FPU) is a math coprocessor, a part of a computer system specially designed to carry out operations onâ€¦Â (More)

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2009

Highly Cited

2009

- IEEE Transactions on Computers
- 2009

Many scientific programs exchange large quantities of double-precision data between processing nodes and with mass storageâ€¦Â (More)

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2009

2009

- 2009

We propose a pseudorandom number generator specialized to generate double precision floating point numbers. It generates 52-bitâ€¦Â (More)

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2007

Highly Cited

2007

- Data Compression Conference (DCC'07)
- 2007

This paper describes FPC, a lossless compression algorithm for linear streams of 64-bit floating-point data. FPC is designed toâ€¦Â (More)

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2005

2005

- 13th Annual IEEE Symposium on Field-Programmableâ€¦
- 2005

Advances in FPGA technology have led to dramatic improvements in double precision floating-point performance. Modern FPGAs boastâ€¦Â (More)

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2003

2003

- Euromicro Symposium on Digital System Designâ€¦
- 2003

Double precision floating-point arithmetic is inadequate for many scientific computations. This paper presents the design of aâ€¦Â (More)

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2003

2003

- FPT
- 2003

We present low cost FPGA floating-point arithmetic circuits for all the common operations, i.e. addition/subtractionâ€¦Â (More)

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2003

2003

- Eleventh Euromicro Conference on Parallelâ€¦
- 2003

We describe DPFPA (double precision floating point accelerator) an FPGA based coprocessor interfaced to the CPU through the PCIâ€¦Â (More)

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2001

Highly Cited

2001

- IEEE Symposium on Computer Arithmetic
- 2001

A quad-double number is an unevaluated sum of four IEEE double precision numbers, capable of representing at least 212 bits ofâ€¦Â (More)

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1997

Highly Cited

1997

- Discrete & Computational Geometry
- 1997

Exact computer arithmetic has a variety of uses including, but not limited to, the robust implementation of geometric algorithmsâ€¦Â (More)

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