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Delta delay
In VHDL simulations, all signal assignments occur with some infinitesimal delay, known as delta delay. Technically, delta delay is of no measurable…
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Signal processing
Simulation software
VHDL
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
An efficient current-based logic cell model for crosstalk delay analysis
D. Das
,
W. Scott
,
Shahin Nazarian
,
H. Zhou
IEEE International Symposium on Quality…
2009
Corpus ID: 356495
Logic Cell modeling is an important component in the analysis and design of CMOS integrated circuits, mostly due to nonlinear…
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2003
2003
Turbo-Coded Modulation of EVRC Speech Encoder with Unequal Error Protection for Fading Channels
Zhi-wen Pan
2003
Corpus ID: 16913144
The Enhanced Variable Rate Codec (EVRC) is a standard for the Speech Service Option 3 for Wideband Spread Spectrum Digital System…
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2002
2002
In search of the origin of VHDL's delta delays
Sumit Ghosh
Proceedings International Symposium on Quality…
2002
Corpus ID: 7695198
This paper has traced the VHDL architects' journey into the world of delta delay including the original need for zero delay usage…
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2002
2002
Crosstalk Analysis, Prevention and Repair Using PrimeTime-SI and Mars-Xtalk
L. Graversen
,
Jakob Salling
,
R. Bloch
,
C. Folting
2002
Corpus ID: 18270467
This paper will describe an evaluation flow for crosstalk analysis, repair and prevention using PrimeTime-SI and Mars-Xtalk…
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Review
2002
Review
2002
21 – Miscellaneous Topics
2002
Corpus ID: 264752813
1997
1997
Signal representations for hidden Markov model based online handwriting recognition
Hans J. G. A. Dolfing
,
Reinhold Häb-Umbach
IEEE International Conference on Acoustics…
1997
Corpus ID: 1554047
Addresses the problem of online, writer-independent, unconstrained handwriting recognition. Based on hidden Markov models (HMM…
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Review
1995
Review
1995
A Functional Semantics for Delta-Delay VHDL Based on Focus
Max Fuchs
,
M. Mendler
1995
Corpus ID: 18284599
This tutorial paper gives a functional semantics for delta-delay VHDL, i.e. VHDL restricted to zero-delay signal assignments. In…
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Review
1995
Review
1995
Veri cation of a Production Cell using an Automatic Veri cation Environment for VHDL
R. Herrmann
1995
Corpus ID: 16941187
This paper presents from the users point of view the automatic veri cation of nontrivial liveness properties for a reactive…
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1994
1994
Reed-Solomon coding for CELP EDAC in land mobile radio
David E. Ray
,
D. Rahikka
Proceedings of ICASSP '94. IEEE International…
1994
Corpus ID: 13098733
Code excited linear prediction (CELP) is a voice-coding technique developed by AT&T Bell Labs and the U.S. Department of Defense…
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1993
1993
Last-Delta Activation: Postponed Process
J. Bergé
,
Alain Fonkoua
,
S. Maginot
,
J. Rouillard
1993
Corpus ID: 118987665
The concept of delta delay - simulation step seen as an infinitesimal delay - is the VHDL artifice to enforce causality in…
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