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Delay slot

Known as: Branch delay slot, Delayed branch logic 
In computer architecture, a delay slot is an instruction slot that gets executed without the effects of a preceding instruction. The most common form… 
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Related topics

Related topics

30 relations
ARM architectureAssembly languageBranch (computer science)Branch predictor

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
On the detection of board delay faults through the execution of functional programs
In the last years, the phenomenon of electronic products passing all tests by the manufacturer but failing in the field (No Fault… 
2014
2014
Performance analysis of bandwidth and gain improvement of printed wide slot antenna using parasitic patch
Here, a printed micro strip line fed wide slot antenna with rotated square slot resonator is presented. This article deals with… 
2012
2012
A low energy consumption MAC protocol for WSN
The design of an energy-efficient Medium Access Control (MAC) protocol is one of the major issues in wireless sensor networks… 
2008
2008
Where is the precore slot? Mapping the layered structure of the clause and German sentence topology
The paper will account for the regularities of word order with German main declarative clauses by using the RRG framework. The… 
2007
2007
Power Consumption and Process Variations:Two Challenges to Design of Next-generation ICs
  • L. Zu
  • 2007
  • Corpus ID: 64155496
Famous IC vendors including Intel,AMD,IBM have scaled their IC technologies into 65nm.High-end IC design aiming at high… 
2007
2007
Conceptual design and study of "engineless" airplane using co-flow jet airfoil
In this paper, a new conceptual “Engineless CFJ Aircraft (ECA) is designed and studied by CFD analysis. This aircraft will have… 
2006
2006
Closed-form design of maximally flat FIR fractional delay filters
Eight types of maximally flat finite impulse response (FIR) fractional delay filters are proposed. They are designed by… 
2005
2005
An analysis of charge-pump phase-locked loops
The charge pump phase-locked loops with a digital sequential phase frequency detector are analyzed using linear and nonlinear… 
1999
1999
Digital circuit design for minimum transient energy and a linear programming method
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous… 
1986
1986
Slot Synchronization in Optical PPM Communications
Maintaining slot clock synchronization in a baseband pulse position modulated (PPM) communication link is vital to its… 
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