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Delay slot
Known as:
Branch delay slot
, Delayed branch logic
In computer architecture, a delay slot is an instruction slot that gets executed without the effects of a preceding instruction. The most common form…
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Related topics
Related topics
30 relations
ARM architecture
Assembly language
Branch (computer science)
Branch predictor
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Optimization of Swastika Slotted Fractal Antenna using Genetic Algorithm and Bat Algorithm for S-band Utilities
Gagandeep Kaur
,
M. Rattan
,
Chahat Jain
Wireless personal communications
2017
Corpus ID: 5186326
A novel pattern of fractal antenna deploying Swastika slotted geometry up to second iteration is used for optimization in this…
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2016
2016
Stochastic Analysis of Complex Repairable System with Deliberate Failure Emphasizing Reboot Delay
Deepak Kumar
,
S. B. Singh
Communications in statistics. Simulation and…
2016
Corpus ID: 205558822
Present paper discusses the reliability analysis of a complex system which consists of two repairable subsystems namely A and B…
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2012
2012
A low energy consumption MAC protocol for WSN
Thibault Bernard
,
H. Fouchal
IEEE International Conference on Communications…
2012
Corpus ID: 2095330
The design of an energy-efficient Medium Access Control (MAC) protocol is one of the major issues in wireless sensor networks…
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Highly Cited
2012
Highly Cited
2012
A sensor-assisted self-authentication framework for hardware trojan detection
A. Davoodi
,
Min Li
,
M. Tehranipoor
Design, Automation and Test in Europe
2012
Corpus ID: 15915157
This work offers a framework which does not rely on a Golden IC (GIC) during hardware Trojan (HT) detection. GIC is a Trojan-free…
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2007
2007
Conceptual design and study of "engineless" airplane using co-flow jet airfoil
J. Aguirre
,
Baoyuan Wang
,
Gecheng Zha
2007
Corpus ID: 33863655
In this paper, a new conceptual “Engineless CFJ Aircraft (ECA) is designed and studied by CFD analysis. This aircraft will have…
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2006
2006
Closed-form design of maximally flat FIR fractional delay filters
S. Pei
,
Peng-Hua Wang
,
Huei-Shan Lin
IEEE Signal Processing Letters
2006
Corpus ID: 116076906
Eight types of maximally flat finite impulse response (FIR) fractional delay filters are proposed. They are designed by…
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2005
2005
An analysis of charge-pump phase-locked loops
Zuoding Wang
IEEE Transactions on Circuits and Systems Part 1…
2005
Corpus ID: 12950216
The charge pump phase-locked loops with a digital sequential phase frequency detector are analyzed using linear and nonlinear…
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1999
1999
Digital circuit design for minimum transient energy and a linear programming method
V. Agrawal
,
M. Bushnell
,
G. Parthasarathy
,
R. Ramadoss
Proceedings Twelfth International Conference on…
1999
Corpus ID: 14084910
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous…
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Highly Cited
1995
Highly Cited
1995
Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuitsy
F. Najm
,
Michael Y. Zhang
Design Automation Conference
1995
Corpus ID: 5776910
We observe that the switching activity at a circuit node, also called the transition density, can be extremely sensitive to the…
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1976
1976
An Experiment on Problem Solving with Delayed Computer Responses
M. Grossberg
,
R. Wiesen
,
D. Yntema
IEEE Transactions on Systems, Man and Cybernetics
1976
Corpus ID: 11790042
Four subjects solved problems on line with the Lincoln Laboratory Reckoner. Controlled delays were interposed between output…
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