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Dataflow architecture
Known as:
Data flow architecture
, Data flow computers
, Data-flow architecture
Dataflow architecture is a computer architecture that directly contrasts the traditional von Neumann architecture or control flow architecture…
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Related topics
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21 relations
Broader (1)
Classes of computers
Compiler
Computer architecture
Content-addressable memory
Database
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
Data Flow Driven Scheduling of BPEL Workflows Using Cloud Resources
Tim Dörnemann
,
Ernst Juhnke
,
T. Noll
,
Dominik Seiler
,
Bernd Freisleben
IEEE International Conference on Cloud Computing
2010
Corpus ID: 10073593
In this paper, an approach to assign BPEL workflow steps to available resources is presented. The approach takes data…
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2001
2001
Retargetable Compiler Technology for Embedded Systems
R. Leupers
,
P. Marwedel
Springer US
2001
Corpus ID: 8588435
State Machine, 116 Action function, 82, 85, 103, 129, 143 Address code optimization, 53 Address generation unit, 53, 89, 94, 97…
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1993
1993
An Efficient Hybrid Dataflow Architecture Modle
G. Gao
J. Parallel Distributed Comput.
1993
Corpus ID: 12194443
In this paper, we present an efficient hybrid architecture model which employee (1) a conventional architecture technique to…
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1993
1993
Prediction of Performance and Processor Requirements in Real-Time Data Flow Architectures
S. Som
,
R. Mielke
,
J. Stoughton
IEEE Trans. Parallel Distributed Syst.
1993
Corpus ID: 10830780
Presents a new data flow graph model for describing the real-time execution of iterative control and signal processing algorithms…
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1991
1991
Structured system analysis and design method
Geoff Cutts
1991
Corpus ID: 58807214
• The three most importatnt techniques that are used in SSADM are : 1. Logical Data Modeling : The process of identifying…
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1990
1990
Data Flow Diagrams and Z
G. Randell
Z User Workshop
1990
Corpus ID: 28646036
This paper explains, by example, how to translate a data flow diagram into an outline Z [1] specification, and also how to…
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1988
1988
A digital-serial silicon compiler
Richard Hartley
,
Peter F. Corbett
25th ACM/IEEE, Design Automation Conference…
1988
Corpus ID: 62390712
A novel silicon compiler is described, called PARSIFAL. It constructs chips with a data-flow architecture in which data is passed…
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1986
1986
The varieties of data flow computers
J. Dennis
1986
Corpus ID: 59684888
1984
1984
Future Computers: Logic, Data Flow, ..., Control Flow?
P. Treleaven
,
Isabel Gouveia Lima
Computer
1984
Corpus ID: 17719626
The following potential architectures for future computers are examined: (1) fifth-generation computers, (2) supercomputers, (3…
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1982
1982
Life-Cycle Software Validation
W. Howden
Computer
1982
Corpus ID: 16567414
Twvo validation activities should take place during each phase of the software life cycle: analysis and test data generation…
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