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DRAM1 gene

Known as: FLJ11259, DRAM1, DNA damage regulated autophagy modulator 1 
National Institutes of Health

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
EASE : Energy-Aware Self-Optimizing DRAM Scheduling
We propose an energy-aware self-optimizing memory controller in which DRAM energy management is integral to the command scheduler… 
Review
2010
Review
2010
DRAM Bandwidth Optimized Design for High-Throughput Video Decoder Chips
i-Abstract The last two decades have witnessed the tremendous advances in video coding technologies. From MPEG-1/2/4 to H.264/AVC… 
2006
2006
Using Linear Tests for Transient Faults in DRAMs
Recent developments in the theory of DRAM fault modeling have identified the space of tests needed to detect all DRAM faults… 
2004
2004
Method and apparatus for the high speed dram establish a desired read latency maintained
Provided is a memory device, to compensate for variations in the delay amount for the data flow of the read clock, to provide a… 
2004
2004
Architecting a RISC processor with DRAM on a chip
2000
2000
A next generation channeled-DRAM architecture with direct background-operation and delayed channel-replacement techniques
As processor performance is reaching the level of executing a single instruction in 1 ns, long memory latencies have become a… 
1999
1999
Embedded DRAM for a Recon gurable
Embedded DRAM for a Recon gurable Array Stylianos Perissakis, Yangsung Joo1, Jinhong Ahn1, Andr e DeHon, John Wawrzynek Computer… 
1999
1999
Signal margin test to identify process sensitivities relevant to DRAM reliability and functionality at low temperatures
With high aspect ratio, tight spacing, small line widths, and low supply voltages associated with the scaling of the DRAM cell… 
1997
1997
DRAM Caching
This paper presents methods to reduce memory latency in the main memory subsystem below the board-level cache. We consider… 
1997
1997
256 Mbit synchronous DRAM
Memory LSIs with large capacity and high speed have seen growing in importance in recent years. A 256 Mbit synchronous DRAM with…