CoreConnect

Known as: PLB (disambiguation), Processor Local Bus 
IBM makes the CoreConnect bus available as a no-fee, no-royalty architecture to tool-vendors, core IP-companies, and chip-development companies. As… (More)
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Advanced Microcontroller Bus ArchitectureBus (computing)Central processing unitGigabyte
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Papers overview

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2016
2016
Hadamard-Coded Modulation for Visible Light Communications
Visible light communication (VLC) systems using the indoor lighting system to also provide downlink communications require high… (More)
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2013
2013
Measurements and Simulations of Low Dark Count Rate Single Photon Avalanche Diode Device in a Low Voltage 180-nm CMOS Image Sensor Technology
This paper presents the key features of single photon avalanche diode (SPAD) devices fabricated in a low voltage commercial 180… (More)
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2012
2012
Sidelobe Suppression for Robust Capon Beamforming With Mainlobe-to-Sidelobe Power Ratio Maximization
High sidelobe level is a major disadvantage of the Capon beamforming. To suppress the sidelobe for interference nulling, this… (More)
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2009
2009
Detection and quantification of marine larvae orientation in the pelagic environment
The pelagic larval phase represents a major opportunity for dispersal in benthic organisms, yet behaviors controlling and… (More)
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2009
2009
WCDS-induced routing for data-aggregation in wireless sensor networks
Wireless sensor networks (WSNs) are often deployed in harsh environments with little human control, thereby necessitating self… (More)
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2005
2005
Mesoscale and seasonal variability of community production and respiration in the surface waters of the N . E . Atlantic Ocean
  • Anne Maixandeaua, Dominique Lefèvrea, +6 authors Bernard Quéguinerb
  • 2005
Gross community production (GCP) and dark community respiration (DCR) rates were measured in the N.E. Atlantic Basin (38–451N and… (More)
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2003
2003
Creating a Formal Veri fi cation Platform for IBM CoreConnect-based SoC ∗
How to ensure functionality correctness in an SoC chip is a troublesome issue. This is because SoC is so complex that it is… (More)
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2000
2000
Formal verification of an IBM CoreConnect processor local bus arbiter core
This paper describes the model checking effort for an arbiter core for the IBM CoreConnect Architecture. We present our… (More)
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1966
1966
Die Bewertung des Zeitfaktors bei der Progeniebehandlung
.... i d~s w a c ~ s t u m und dle Ent~icltIung mi~ dem Zciffak~0r eng verbunaen, : dCr Zei~punkt der Ein~filhru@ der Be… (More)
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1943
1943
Zur Wirkung und gerichtsmedizinischen Beurteilung von aus Karabiner 98 k abgegebenen Platzpatronenschüssen
Den eigentlichen AnlaB zu der folgenden Studie und den hierzu notwendigen Untersuehungen gab ein gelegentlich einer milit… (More)
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