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Clock network

Known as: Clock strata, Clock stratum, Clock system 
A clock network or clock system is a set of synchronized clocks designed to always show exactly the same time by communicating with each other. Clock… 
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Related topics

Related topics

10 relations

Broader (1)

Broadcast engineering
Master controlMaster/slave (technology)ModemRS-232

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Review
2012
Review
2012
Novel Approaches and Developments in Colon Specific Drug Delivery Systems- A Review
Colon specific drug delivery has gained increased importance not for the treatment of local diseases associated with the colon… 
2012
2012
Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops
This paper presents a novel test point insertion method for pseudorandom built-in self-test (BIST) to reduce the area overhead… 
2010
2010
Two-Phase sinusoidal Power-Clocked Quasi-Adiabatic Logic Circuits
This paper presents the design and performance analysis of the dual-rail encoded and sense-amplifier structured 2N–2P, 2N–2N2P… 
2008
2008
Activity and register placement aware gated clock network design
Clock gating is one of the most effective techniques to reduce clock network power dissipation. Although it has already been… 
2005
2005
A 90nm variable-frequency clock system for a power-managed Itanium/sup /spl reg//-family processor
A clock-generation system delivers fixed- and variable-frequency clocks for adaptive power control on a 1.7 B-transistor dual… 
2005
2005
Initialization of a wireless clock distribution system using an external antenna
A compact wireless clock distribution system with an external planar array antenna which can provide phase uniformity suitable… 
2002
2002
Hierarchical data invalidation analysis for scan-based debug on multiple-clock system chips
To debug a digital chip with a scan-based debug methodology, the chip is stopped at a certain point in time in the application… 
Review
2002
Review
2002
Impact of technology scaling in the clock system power
The clock distribution and generation circuitry is known to consume more than a quarter of the power budget of existing… 
2002
2002
Inductance model and analysis methodology for high-speed on-chip interconnect
With operating frequencies entering the multi-gigahertz range, inductance has become an important consideration in the design and… 
1997
1997
Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations
This paper addresses the problem of clocking large high-speed digital systems, as well as deterministic skew modeling, a related… 
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