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Bus network

Known as: Bus topology, Linear bus topology 
A bus network is a network topology in which nodes are directly connected to a common linear (or branched) half-duplex link called a bus.
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Papers overview

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2015
2015
On-chip interconnect is a major building block and a main performance bottleneck in modern complex System-on-Chips (SoCs). The… 
2014
2014
Intra-chip communication is a major bottleneck in modern multiprocessor system-on-chip (MPSoC) designs. The bus topology is the… 
2008
2008
The model for optimization of transit system is developed by relating the demand of a mode to the aggregate cost of travel… 
2006
2006
Evolution of public road transportation system requires analysis and planning tools to improve the service quality. A wide range… 
2004
2004
The ring bus configuration, a topology commonly used at transmission voltage levels, can provide significant enhancements in… 
1997
1997
Financial operators have today access to an extremely large amount of data, both quantitative and qualitative, real-time or… 
1996
1996
The heart of a massively parallel computer is its interconnection network. In this article we present a reconfigurable multiple… 
1993
1993
The authors present new power distribution synthesis techniques that can handle realistic analog and mixed-signal performance… 
1989
1989
  • A. Kamal
  • 1989
  • Corpus ID: 2376839
An exact analysis of the carrier-sense multiple-access (CSMA) protocol on the bus topology is presented. All stations are…