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Branch misprediction

Known as: Misprediction 
Branch misprediction occurs when a central processing unit (CPU) mispredicts the next instruction to process in branch prediction, which is aimed at… 
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Related topics

Related topics

9 relations
Alpha 21064Apple A9Branch (computer science)Bulldozer (microarchitecture)

Papers overview

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2018
2018
Feature extraction Feature vector Prediction Adversarial feature vector Prediction
Binary code authorship identification determines authors of a binary program. Existing techniques have used supervised machine… 
2009
2009
Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors
In this paper we present deterministic clock gating schemes for various micro architectural blocks of a modern out-of-order… 
2007
2007
How to correct the link stack circuit and the device
A link stack in a processor is repaired in response to a procedure return address misprediction error. In one example, a link… 
2007
2007
Seismic properties of carbonate rocks with emphasis on effects of the pore structure
The many acoustic observations of carbonate rocks, such as large scattering of velocities with equal porosity and mineralogy, or… 
2003
2003
Branch Prediction using Advanced Neural Methods
Among the hardware techniques, two-level adaptive branch predictors with two-bit saturating counters are acknowledged as best… 
2002
2002
Address Prediction and Recovery Mechanisms
Uno de los mayores retos que debe ser afrontado por los disenadores de micro-procesadores es el de mitigar la gran latencia de… 
2001
2001
On the exploitation of value prediction and producer identification to reduce barrier synchronization time
Barrier synchronization is a source of inefficiency in many parallel programs, due to the association of many producer-consumer… 
1999
1999
Reducing branch misprediction penalty through multipath execution
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. If the… 
1998
1998
Lazy prefetching
High latency of memory accesses is critical to the performance of shared memory multiprocessors. The technology trends indicate… 
1995
1995
Reducing the number of queries in self-directed learning
predlctiou are accomplished in polynomial time in each Ill this pap?r, we stlldy the t,ra(leof hetweerr stage. The objective of…