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Binary logarithm
Known as:
Logarithmus dualis
, Log2
, Logarithmus binaris
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In mathematics, the binary logarithm (log2 n) is the power to which the number 2 must be raised to obtain the value n. That is, for any real number x…
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Related topics
Related topics
50 relations
AKS primality test
Algorithm
Analysis of algorithms
Binary entropy function
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Throughput Maximization in Cognitive Radio Under Peak Interference Constraints With Limited Feedback
Yuanyuan He
,
S. Dey
IEEE Transactions on Vehicular Technology
2012
Corpus ID: 5253506
A spectrum-sharing scenario in a cognitive radio (CR) network where a secondary user (SU) shares a narrowband channel with N…
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2009
2009
An almost O(log k)-approximation for k-connected subgraphs
Zeev Nutov
ACM-SIAM Symposium on Discrete Algorithms
2009
Corpus ID: 15345046
We consider two cases of the Survivable Network Design (SND) problem: given a complete graph Gn = (V, En) with costs on the edges…
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2009
2009
An Optimal Transmit Power Allocation for the Two-Way Relay Channel Using Physical-Layer Network Coding
Wonjae Shin
,
Namyoon Lee
,
Jong-Han Lim
,
Changyong Shin
IEEE International Conference on Communications…
2009
Corpus ID: 45296033
A two-way relaying system using the physical-layer network coding (PNC) does not cause the spectral loss induced by the half…
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2009
2009
Tight Bounds for Quasirandom Rumor Spreading
Spyros Angelopoulos
,
Benjamin Doerr
,
Anna Huber
,
K. Panagiotou
Electronic Journal of Combinatorics
2009
Corpus ID: 5845902
This paper addresses the following fundamental problem: Suppose that in a group of n people, where each person knows all other…
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2007
2007
Identifying stochastic basin hopping by partitioning with graph modularity
N. Santitissadeekorn
,
E. Bollt
2007
Corpus ID: 18131826
Highly Cited
1989
Highly Cited
1989
Fault-Tolerant Routing in Multistage Interconnection Networks
A. Varma
,
C. Raghavendra
IEEE Trans. Computers
1989
Corpus ID: 9142941
The fault tolerance of multiprocessor systems with multistage interconnection networks under multiple faults in the network is…
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Highly Cited
1987
Highly Cited
1987
An Improved Algorithm for Constructing k th-Order Voronoi Diagrams
B. Chazelle
,
H. Edelsbrunner
IEEE Trans. Computers
1987
Corpus ID: 38876996
The kth-order Voronoi diagram of a finite set of sites in the Euclidean plane E2 subdivides E2 into maximal regions such that all…
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Review
1987
Review
1987
VLSI Architectures for Multidimensional Fourier Transform Processing
I. Gertner
,
Moshe Shamash
IEEE transactions on computers
1987
Corpus ID: 35165704
It is often desirable in modern signal processing applications to perform two-dimensional or three-dimensional Fourier transforms…
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Highly Cited
1976
Highly Cited
1976
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
T. Lang
IEEE transactions on computers
1976
Corpus ID: 33840542
The shuffle-exchange network is considered as an interconnection network between processors and memory modules in an array…
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Highly Cited
1976
Highly Cited
1976
A Shuffle-Exchange Network with Simplified Control
T. Lang
,
H. Stone
IEEE transactions on computers
1976
Corpus ID: 206621109
In this paper, a control mechanism for a shuffle-exchange interconnection network of N cells is proposed. With this network it is…
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