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Binary logarithm
Known as:
Logarithmus dualis
, Log2
, Logarithmus binaris
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In mathematics, the binary logarithm (log2 n) is the power to which the number 2 must be raised to obtain the value n. That is, for any real number x…
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Related topics
Related topics
50 relations
AKS primality test
Algorithm
Analysis of algorithms
Binary entropy function
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Energy-Efficient Frequency and Power Allocation for Cognitive Radios in Television Systems
K. Illanko
,
M. Naeem
,
A. Anpalagan
,
D. Androutsos
IEEE Systems Journal
2016
Corpus ID: 6730584
Energy-efficient resource allocation for cognitive radios operating in television systems (TV white spaces) presents a unique…
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2014
2014
On the impact of geometry on ad hoc communication in wireless networks
T. Jurdzinski
,
D. Kowalski
,
M. Różański
,
Grzegorz Stachowiak
ACM SIGACT-SIGOPS Symposium on Principles of…
2014
Corpus ID: 335141
In this work we address the question how important is the knowledge of geometric location and network density to the efficiency…
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2009
2009
An Optimal Transmit Power Allocation for the Two-Way Relay Channel Using Physical-Layer Network Coding
Wonjae Shin
,
Namyoon Lee
,
Jong-Han Lim
,
Changyong Shin
IEEE International Conference on Communications…
2009
Corpus ID: 45296033
A two-way relaying system using the physical-layer network coding (PNC) does not cause the spectral loss induced by the half…
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2008
2008
Non-Coherent Amplify-and-Forward Generalized Likelihood Ratio Test Receiver
M. Souryal
IEEE GLOBECOM - IEEE Global Telecommunications…
2008
Corpus ID: 7877207
This paper proposes a simple non-coherent amplify- and-forward receiver for the relay channel and evaluates its diversity…
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1988
1988
Efficient Parallel Triconnectivity in Logarithmic Time
V. Ramachandran
,
U. Vishkin
Aegean Workshop on Computing
1988
Corpus ID: 43540432
We present two new techniques for trimming a logarithmic factor from the running time of efficient parallel algorithms for graph…
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Review
1987
Review
1987
VLSI Architectures for Multidimensional Fourier Transform Processing
I. Gertner
,
Moshe Shamash
IEEE transactions on computers
1987
Corpus ID: 35165704
It is often desirable in modern signal processing applications to perform two-dimensional or three-dimensional Fourier transforms…
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Highly Cited
1987
Highly Cited
1987
An Improved Algorithm for Constructing k th-Order Voronoi Diagrams
B. Chazelle
,
H. Edelsbrunner
IEEE Trans. Computers
1987
Corpus ID: 38876996
The kth-order Voronoi diagram of a finite set of sites in the Euclidean plane E2 subdivides E2 into maximal regions such that all…
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Highly Cited
1976
Highly Cited
1976
Interconnections Between Processors and Memory Modules Using the Shuffle-Exchange Network
T. Lang
IEEE transactions on computers
1976
Corpus ID: 33840542
The shuffle-exchange network is considered as an interconnection network between processors and memory modules in an array…
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Highly Cited
1976
Highly Cited
1976
A Shuffle-Exchange Network with Simplified Control
T. Lang
,
H. Stone
IEEE transactions on computers
1976
Corpus ID: 206621109
In this paper, a control mechanism for a shuffle-exchange interconnection network of N cells is proposed. With this network it is…
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Review
1962
Review
1962
A Sorting Problem
R. C. Bose
,
R. J. Nelson
JACM
1962
Corpus ID: 215747529
An important problem in sorting is to arrange item keys in monotonic ascending order within the internal memory of a digital…
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