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Write-only documentation
Known as:
Write-only
Write-only documentation (WOD) is a tongue-in-cheek term for documentation that is written to satisfy a process but never read subsequent to its…
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Documentation
Programmer
Requirements analysis
Software documentation
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Low-cost guaranteed-throughput communication ring for real-time streaming MPSoCs
B. Dekens
,
P. Wilmanns
,
M. Bekooij
,
G. Smit
Conference on Design and Architectures for Signal…
2013
Corpus ID: 10399140
Connection-oriented guaranteed-throughput mesh-based networks on chip have been proposed as a replacement for buses in real-time…
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2013
2013
Light-weight operation of a failover system for Cloud computing
Pakpoom Mookdarsanit
,
Sethavidh Gertphol
International Conference on Knowledge and Smart…
2013
Corpus ID: 34866016
Availability is one of the biggest challenges which slow down the adoption of Cloud computing in the IT industry. A failover…
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2009
2009
SEMICONDUCTOR INTEGRATED CIRCUITS: Testing content addressable memories with physical fault models
M. Lin
,
Yang Xu
,
Zhong Shiqiang
,
Yunji Chen
2009
Corpus ID: 56857703
Content addressable memory (CAM) is widely used and its tests mostly use functional fault models. However, functional fault…
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2008
2008
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
J. Spjut
,
Solomon Boulos
,
D. Kopta
,
E. Brunvand
,
Spencer S. Kellis
IEEE Symposium on Application Specific Processors
2008
Corpus ID: 5423762
Ray tracing is a technique used for generating highly realistic computer graphics images. In this paper, we explore the design of…
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Highly Cited
2005
Highly Cited
2005
Building Predictable Systems on Chip: An Analysis of Guaranteed Communication in the Aethereal Network on Chip
Om Prakash Gangwal
,
A. Radulescu
,
K. Goossens
,
S. Pestana
,
E. Rijpkema
2005
Corpus ID: 59892164
As the complexity of Systems-on-Chip (SoC) is growing, meeting real-time requirements is becoming increasingly difficult…
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2004
2004
ESTmapper: Efficiently Clustering EST Sequences Using Genome Maps
Xue Wu
,
Woei-Jyh Lee
,
Damayanti Gupta
,
C. Tseng
2004
Corpus ID: 18318252
Expressed sequence tags (ESTs) are short transcribed nucleotide sequences that can be used to discover new genes and measuring…
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2000
2000
Testing Address Decoder Faults in Two-Port Memories: Fault Models, Tests, Consequences of Port Restrictions, and Test Strategy
S. Hamdioui
,
A. V. Goor
Journal of electronic testing
2000
Corpus ID: 18291985
A two-port memory contains two duplicated sets of address decoders, which operate independently. Testing such memories requires…
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1998
1998
Consequences of port restrictions on testing two-port memories
S. Hamdioui
,
A. V. Goor
Proceedings International Test Conference (IEEE…
1998
Corpus ID: 14579156
Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines…
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1996
1996
ENWRICH: a compute-processor write caching scheme for parallel file systems
A. Purakayastha
,
C. Ellis
,
D. Kotz
Workshop on I/O in Parallel and Distributed…
1996
Corpus ID: 2528846
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been…
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1994
1994
A 200 MHz internal/66 MHz external 64 kB embedded virtual three-port cache SRAM
G. Braceras
,
T. Frederick
,
+4 authors
R. Ross
IEEE International Solid-State Circuits…
1994
Corpus ID: 60822986
A 66 MHz, 64 kB three-port cache SRAM has a 95 /spl mu/m/sup 2/ six-device cell and three internal pipelined accesses, allowing…
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